Specific Process Knowledge/Thermal Process/Annealing: Difference between revisions

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Annealing

At DTU Nanolab we have five furnaces and two RTP (rapid thermal processor) that can be used for annealing: Anneal-Oxide furnace (C1), Anneal-bond furnace (C3), Al_anneal furnace (C4), Multipurpose Anneal furnace, RTP2 Jipelec and RTP Annealsys (last one, reserved to research). Annealing normally takes place in an N₂ atmosphere, or it can be done in H₂ or a H₂-N₂ gas mixture in the Multipurpose Anneal furnace. PECVD PBSG glass is annealed in a wet atmosphere which will also oxidize the silicon substrate.

A 20-minute N₂ annealing step is also included in all recipes on the oxidation furnace, this annealing is done after the oxidation.

Comparison of the annealing furnaces

	Anneal Oxide furnace (C1)	Anneal-Bond furnace (C3)	Aluminium Anneal furnace (C4)	Resist Pyrolysis (research tool)	RTP2 Jipelec	RTP Annealsys (research tool)
General description	Annealing of 4" and 6" wafers. Annealing of wafers from the LPCVD furnaces and from PECVD4.	Annealing of wafers from Wafer Bonder 02 and from and PECVD4 and PECVD3.	Annealing of wafers and samples with Al and ALD deposited AL₂O₃ and TiO₂	Resist pyrolysis	Rapid thermal processing, usually, annealing (RTA).	Rapid thermal processing: RTA (annealing), RTO (oxidation), RTN (nitridation) and RTH (hydrogenation).
Annealing gas	N₂	N₂	N₂ (Forming gas, 5% H₂/95% N₂ - Being tested)	N₂ (H₂-N₂ gas mixture) Vacuum is possible	Ar N₂ Low vacuum is possible (min. 2/3 mbar)	Ar NH₃ O₂ 5% H₂/Ar High vacuum is possible (10^-6 mbar)
Process temperature	700 ^oC - 1100 ^oC	700 ^oC - 1150 ^oC	350 ^oC - 1150 ^oC Max 500 ^oC for wafers and samples with Al	Vacuum: 20 ^oC - 1050 ^oC¨ No vacuum: 20 ^oC - 1050 ^oC	20 ^oC - 1200 ^oC Max. 100 ^oC/s with carrier wafer or sample wafer Max. 50 ^oC/s with SiC-coated graphite susceptor	700 ^oC - 1200 ^oC Max. 150 ^oC/s
Substrate and Batch size	1-30 50 mm wafers 1-30 100 mm wafers 1-30 150 mm wafer (Small samples on a carrier wafer, horizontal)	1-30 50 mm wafers 1-30 100 mm wafers Small samples on a carrier wafer, horizontal	1-30 50 mm wafers 1-30 100 mm wafers 1 150 mm wafer Small samples on a carrier wafer, horizontal	1-30 50 mm, 100 mm or 150 mm wafers Small samples on a carrier wafer, horizontal	Single-wafer process Chips on carrier 50 mm, 100 mm or 150 mm wafers	Single-wafer process Chips on carrier 100 mm or 150 mm wafers
Allowed materials	All processed wafers have to be RCA cleaned, except wafers from LPCVD furnaces and PECVD4.	All processed wafers have to be RCA cleaned, except wafers from the Wafer Bonder 02 and from PECVD4 and PECVD3.	Wafers and samples with Al and ALD deposited AL₂O₃ and TiO₂	Samples for resist pyrolysis. No metals allowed	Silicon Silicon oxides and nitrides Quartz Metals - ask for permission III-V materials - below 440 °C, otherwise it can lead to outgassing of toxic gases.	Silicon Silicon Nitride Aluminum Oxide

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+'''Feedback to this page''': '''[mailto:labadviser@nanolab.dtu.dk?Subject=Feed%20back%20from%20page%20http://labadviser.nanolab.dtu.dk/index.php/Specific_Process_Knowledge/Thermal_Process/Annealing click here]'''
+''This page is written by DTU Nanolab  internal''
 ==Annealing==
-At Danchip we have seven furnaces and an RTP for annealing: A1, A3, C1, C2, C3, C4, noble furnace and RTP. Annealing normally takes place in an N<sub>2</sub> atmosphere. PECVD PBSG is annealed in an wet atmosphere which will also oxidize the silicon substrate.
-*Anneal with N<sub>2</sub> can be done in furnaces:A1,A3,C1,C2,C3,C4, noble furnace and RTP
+At DTU Nanolab  we have five furnaces and two RTP (rapid thermal processor) that can be used for annealing: Anneal-Oxide furnace (C1), Anneal-bond furnace (C3), Al_anneal furnace (C4), Multipurpose Anneal furnace, RTP2 Jipelec and RTP Annealsys (last one, reserved to research). Annealing normally takes place in an N<sub>2</sub> atmosphere, or it can be done in H<sub>2</sub> or a H<sub>2</sub>-N<sub>2</sub> gas mixture in the Multipurpose Anneal furnace. PECVD PBSG glass is annealed in a wet atmosphere which will also oxidize the silicon substrate.
-*Wet anneal with H<sub>2</sub>O in a bubbler can be done in furnaces:C1 and C3.
-==Comparison of the seven annealing equipments==
+A 20-minute N<sub>2</sub> annealing step is also included in all recipes on the oxidation furnace, this annealing is done after the oxidation.
-{| {{table}} border="2" cellspacing="0" cellpadding="8" width="1000pt"
-| valign="top" align="center" style="background:#f0f0f0;"|
+==Comparison of the annealing furnaces==
-| valign="top" align="center" style="background:#f0f0f0;"|'''A1 <br /> Boron drive-in'''
-| valign="top" align="center" style="background:#f0f0f0;"|'''A3 <br />Phosphorous drive-in'''
+{|border="1" cellspacing="1" cellpadding="3" style="text-align:left;"
-| valign="top" align="center" style="background:#f0f0f0;"|'''C1 <br />Anneal oxide'''
-| valign="top" align="center" style="background:#f0f0f0;"|'''C2 <br />Gate oxide'''
-| valign="top" align="center" style="background:#f0f0f0;"|'''C3 <br />Anneal bond'''
-| valign="top" align="center" style="background:#f0f0f0;"|'''C4 <br />Anneal aluminium'''
-| valign="top" align="center" style="background:#f0f0f0;"|'''Nobel furnace'''
-| valign="top" align="center" style="background:#f0f0f0;"|'''RTP'''
-|-valign="top"
-! General description
-|Drive-in of boron deposited in the boron pre-dep furnace(A2) or drive-in of ion implanted boron. Can also be used for oxidation.||Drive-in of phosphorous deposited in the phosphorous pre-dep furnace(A2) or drive-in of ion implanted phosphorous. Can also be used for oxidation.||Annealing and oxidation of wafers from the B-stack and PECVD1. At the moment also used for general annealing and oxidation of 6" wafers.||Oxidation of gate-oxide and other especially clean oxides.||Annealing and oxidation of wafers from NIL.||Annealing of wafers with aluminium.||Annealing and oxidation of any material.||Rapid thermal annealing.
 |-
-! Annealing with N<sub>2</sub>
-|x||x||x||x (with special permission)||x||x||x||x
 |-
-!Wet annealing with bubler (water steam + N<sub>2</sub>)
+|-style="background:silver; color:black"
-|.||.||x||.||x||.||.||.
+|
+!
+[[Specific_Process_Knowledge/Thermal_Process/C1_Furnace_Anneal-oxide|Anneal Oxide furnace (C1)]]
+!
+[[Specific_Process_Knowledge/Thermal_Process/C3_Anneal-bond_furnace|Anneal-Bond furnace (C3)]]
+!
+[[Specific Process Knowledge/Thermal Process/C4 Aluminium Anneal furnace|Aluminium Anneal furnace (C4)]]
+!
+[[Specific Process Knowledge/Thermal Process/Furnace: Multipurpose annealing|Resist Pyrolysis (research tool)]]
+!
+[[Specific_Process_Knowledge/Thermal_Process/RTP Jipelec 2| RTP2 Jipelec]]
+!
+[[Specific_Process_Knowledge/Thermal_Process/RTP Annealsys| RTP Annealsys (research tool)]]
 |-
-!Process temperature [ <sup>o</sup>C ]
-|800-1150||800-1150||800-1150||800-1150||800-1150||800-1150||22-1000<sup>o</sup>C||22-1000<sup>o</sup>C
-|-valign="top"
-! Batch size
-|max. 30 wafers of 4" or 2"||max. 30 4" wafers or 2" wafers||max. 30 wafers of 6",4" or 2"||max. 30 4" wafers or 2" wafers||max. 30 4" wafers or 2" wafers||max. 30 4" wafers or 2" wafers||30x4" or small pieces||1x4" or small pieces
 |-
-!style="background:#f0f0f0;"|Which wafers are allowed to enter the furnace:
+|-style="background:WhiteSmoke; color:black"
-| valign="top" align="center" style="background:#f0f0f0;"|'''A1 <br />Boron drive-in'''
+!General description
-| valign="top" align="center" style="background:#f0f0f0;"|'''A3 <br />Phosphorous drive-in'''
+|Annealing of 4" and 6" wafers. Annealing of wafers from the LPCVD furnaces and from PECVD4.
-| valign="top" align="center" style="background:#f0f0f0;"|'''C1 <br />Anneal oxide'''
+|Annealing of wafers from Wafer Bonder 02 and from and PECVD4 and PECVD3.
-| valign="top" align="center" style="background:#f0f0f0;"|'''C2 <br />Gate oxide'''
+|Annealing of wafers and samples with Al and ALD deposited AL<sub>2</sub>O<sub>3</sub> and TiO<sub>2</sub>
-| valign="top" align="center" style="background:#f0f0f0;"|'''C3 <br />Anneal bond'''
+|Resist pyrolysis
-| valign="top" align="center" style="background:#f0f0f0;"|'''C4 <br />Anneal aluminium'''
+|Rapid thermal processing, usually, annealing (RTA).
-| valign="top" align="center" style="background:#f0f0f0;"|'''Nobel'''
+|Rapid thermal processing: RTA (annealing), RTO (oxidation), RTN (nitridation) and RTH (hydrogenation).
-| valign="top" align="center" style="background:#f0f0f0;"|'''RTP'''
 |-
-| New clean* Si wafers 4" (6" in C1)||x||x||x||x (with special permission)||x||x||x||x
 |-
-| RCA clean** Si wafers with no history of Metals on||x||x||x||x (with special permission)||x||x||x||x
+|-style="background:LightGrey; color:black"
+!Annealing gas
+|
+*N<sub>2</sub>
+|
+*N<sub>2</sub>
+|
+*N<sub>2</sub>
+*(Forming gas, 5% H<sub>2</sub>/95% N<sub>2</sub> - Being tested)
+|
+*N<sub>2</sub>
+*(H<sub>2</sub>-N<sub>2</sub> gas mixture)
+*Vacuum is possible
+|
+*Ar
+*N<sub>2</sub>
+*Low vacuum is possible (min. 2/3 mbar)
+|
+*Ar
+*NH<sub>3</sub>
+*O<sub>2</sub>
+*5% H<sub>2</sub>/Ar
+*High vacuum is possible (10<sup>-6</sup> mbar)
 |-
-| From Predep furnace  directly (e.g. incl. Predep HF**)||From A2||From A4||x||.||x||x||x||x
 |-
-| Wafers directly from PECVD1||.||.||x||.||x||x||x||x
+|-style="background:WhiteSmoke; color:black"
+!Process temperature
+|
+*700 <sup>o</sup>C - 1100 <sup>o</sup>C
+|
+*700 <sup>o</sup>C - 1150 <sup>o</sup>C
+|
+*350 <sup>o</sup>C - 1150 <sup>o</sup>C
+*Max 500 <sup>o</sup>C for wafers and samples with Al
+|
+*Vacuum: 20 <sup>o</sup>C - 1050 <sup>o</sup>C¨
+*No vacuum: 20 <sup>o</sup>C - 1050 <sup>o</sup>C
+|
+*20 <sup>o</sup>C - 1200 <sup>o</sup>C
+* '''Max. 100 <sup>o</sup>C/s''' with '''carrier wafer''' or '''sample wafer'''
+* '''Max. 50 <sup>o</sup>C/s''' with SiC-coated graphite '''susceptor'''
+|
+*700 <sup>o</sup>C - 1200 <sup>o</sup>C
+*Max. 150 <sup>o</sup>C/s
 |-
-| Wafers directly from NIL bonding||.||.||.||.||x||x||x||x
 |-
-|Wafers with aluminium||.||.||.||.||.||x||x||.
+|-style="background:LightGrey; color:black"
+!Substrate and Batch size
+|
+*1-30 50 mm wafers
+*1-30 100 mm wafers
+*1-30 150 mm wafer
+*(Small samples on a carrier wafer, horizontal)
+|
+*1-30 50 mm wafers
+*1-30 100 mm wafers
+*Small samples on a carrier wafer, horizontal
+|
+*1-30 50 mm wafers
+*1-30 100 mm wafers
+*1 150 mm wafer
+*Small samples on a carrier wafer, horizontal
+|
+*1-30 50 mm, 100 mm or 150 mm wafers
+*Small samples on a carrier wafer, horizontal
+|
+*Single-wafer process
+*Chips on carrier
+*50 mm, 100 mm or 150 mm wafers
+|
+*Single-wafer process
+*Chips on carrier
+*100 mm or 150 mm wafers
 |-
-|wafers with other metals||.||.||.||.||.||.||x||.
 |-
-|wafers with III-V materials||||||||||||||||x
+|-style="background:WhiteSmoke; color:black"
+!'''Allowed materials'''
+|
+*All processed wafers have to be RCA cleaned, except wafers from LPCVD furnaces and PECVD4.
+|
+*All processed wafers have to be RCA cleaned, except wafers from the Wafer Bonder 02 and from PECVD4 and PECVD3.
+|
+*Wafers and samples with Al and ALD deposited AL<sub>2</sub>O<sub>3</sub> and TiO<sub>2</sub>
+|
+*Samples for resist pyrolysis.
+*No metals allowed
+|
+*Silicon
+*Silicon oxides and nitrides
+*Quartz
+*Metals - ask for permission
+*III-V materials - '''below 440 °C''', otherwise it can lead to outgassing of toxic gases.
+|
+*Silicon
+*Silicon Nitride
+*Aluminum Oxide
 |-
 |}
-<nowiki>*</nowiki>New clean: only right from the new clean box. It is not allowed to put them in another box first.
+<br clear="all" />
-<nowiki>**</nowiki>These wafers must be placed in a "transport box from RCA to furnace" using the RCA carrier when doing RCA or the pre-dep carrier after pre-dep.