Specific Process Knowledge/Etch/DRIE-Pegasus/Pegasus-4/SiO2 Etch: Difference between revisions

From LabAdviser
Jump to navigation Jump to search
Line 133: Line 133:
</gallery>
</gallery>


<gallery caption="EM tests with Cr mask on full wafer" perrow="3" widths="400px" heights="300px">
<gallery caption="EM tests with Cr mask on full wafer 6 min etch" perrow="3" widths="400px" heights="300px">
File:C09721_center_05.jpg
File:C09721_center_05.jpg
File:C09721_center_07.jpg
File:C09721_center_07.jpg

Revision as of 12:55, 11 September 2023

SiO2 Etch using resist as masking material

Unless otherwise stated, all content in this section was done by Berit Herstrøm, DTU Nanolab
I have do some development of a SiO2 etch with resist as masking material. I have found this fairly good recipe. For now it is the standard SiO2 etch recipes but I might change the "Standard recipe" a a later time if I find a better one. If you need to etch deeper than 1 micrometer then I advise you to split the etch in several runs with O2 cleans in between (3min TDESC Clean) or else it seems like the the etch rate is going down over time.


Uniformity results with SiO2_res_10

Etched for 3min56s, average etch rate: 250 nm/min +- 2.9%


Results with SiO2_res_10 and EM

Etched with EM:02/30 for 2min, average etch rate: 275 nm/min +- 4.5%. The electro magnets changed the uniformity pattern and made it a bit worse


Using the electromagnetic coil on the recipe SiO2_res_10 gave higher etch rate on this chip that was placed in the center of a 6" wafer. The Etch profile is more angles.


SiO2 Etch using aSi as masking material

Unless otherwise stated, all content in this section was done by Berit Herstrøm, DTU Nanolab
I am now starting up development of SiO2 etch using aSi as masking material.
The samples I use are:

  • 6" Si afters with oxide (2µm),
  • aSi (~300nm),
  • Neg. DUV reist (~60nm barc, ~350 nm resist)
  • Reticle: Danchip/Triple-D
  • Dose 230 J/m2

First I need to make sure that the resist work for pattering the aSi layer is good. If the resist is not good the final etch will also not be good.

DUV optimization

Dose test with the doses (J/m2): 200, 210, 220, 230, 240, 250, 270, 280 The aim was to get good line for 400nm pitch/200nm lines


Testing with electromagnetic coils

Unless otherwise stated, all content in this section was done by Berit Herstrøm, DTU Nanolab

When testing with decreased platen power on the SiO2_10 standard recipe the uniformity got very bad. I then tested with the electromagnetics coil to see if that could affect the uniformity. There is an outer coil that can be varied between 0 A and 10 A and an inner coil that can be varied between 0 A and 30 A. The first tests were done on Si/SiO2(1µm) without pattern and measured on the ellipsometer.

Parameter Recipe name: no 10 with lower platen power
Coil Power [W] 2500
Platen Power [W] 200
Platen temperature [oC] 20
H2 flow [sccm] 25.6
C4F8 flow [sccm] 25.6
He flow [sccm] 448.7
Pressure Fully open APC valve (8-9 mTorr)
Electromagnetic coils (EM) 'outer coil' / 'inner coil' '0-10 A' / '0-30 A'