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| = Question 1=
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| Last Friday I ran the first nanoetches with the recipe below - with limited success however. I was short on
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| time so I couldn't investigate it further but for some reason the coil power would rise to some 1500 W in the
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| first few seconds of the etch and og out of tolerance. I tried switching to forward power, no success. I
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| copied a switched recipe and adjusted all the parameters that I know to change and switched to continuous
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| tolerance recipe. What about matching, wouldn't it be good idea to try and run the process manually
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| (ramping up RF powers and allowing the matching network to stabilize and setting the load/tune parameters
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| as starting points?) and I don't need to strike the plasma...?
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| A01:It is odd that the power delivery went up to 1500W when the demand was 800W. It sounds like the
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| matching needs to be looked at more closely. Careful set up of the starting positions will be needed; these
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| will likely be different to what has worked before in any other recipe as the conditions for this process are
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| quite different.
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| It will be worth doing a trial run on a PR-coated or oxide wafer where a strike pressure of 20mT is allowed
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| just to get the plasma struck, then record the load and tune values when the pressure gets to the desired
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| 4mT and is running stable. The load and tune start points should then be set to values ~5% away from the
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| "sweet spot"; when the RF first comes on the transient in the impedance forces the matching unit to search -
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| we want the unit to search towards the sweet spot positions and not away from them - if the start point is
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| set to the best value then it will likely never match properly as the caps will drive away from these positions
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| as soon as the power comes through.
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| There are two methods of achieving good matching:
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| 1. Start points set to 5% below and 5% above the sweet spot on the Load and Tune respectively OR 2. The
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| Load set to start in the sweet spot position and Tune set 5% below
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| 4mT is a difficult pressure to strike at so it may be necessary to use the strike pressure anyway; only 3s of
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| plasma in 10-20mT strike pressure range should have little-to-no effect on the process result.
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| Q02a:I have tried many times now and I can't find a stable, repeatable process. I would like you to comment on
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| the following facts/observations: I try to find a stable process on a 4" si wafer coated with AZ PR with 80 % exposed to plasma. The actual wafers are 2" Si wafers with some 100 nm ZEP resist and only very small nm-sized areas in the center and lying on 4" dummy wafer with 2" reces.
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| A02a: This is an unusual mix. The set up wafer sounds fine - standard 100mm wafer with AZ PR coating.
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| The 2" wafer on 4" dummy is unusual in Pegasus (most Pegasus tools are at 150-200mm), I have completed
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| many process runs on mounted-wafer pieces using coogrease or crystalbond which would likely mimic your
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| set up. What is unusual is the "dummy wafer with 2" recess" - I am not sure what this is. Either way, this
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| should have no effect on the coil matching.
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| Q02b: I don't know why the coil power shoots up (sometimes above 2000 W) in the very first seconds of the etch.
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| Adding a 15 second strike @ 15 mtorr, playing around with coil matching parameters (as suggested by you
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| below), using load or forward coil power or introducing 15 seconds gas stabilizations do not seem to make
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| much difference.
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| A02b:The two datalogs you sent do not show any issue with reflected coil power in the first few seconds of
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| processing. There is no large reflected power spike and coil matching unit performance looks stable. 15s
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| gas stabilisation should ALWAYS be run - the most important part of the stabilisation is the homing of the
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| matching unit to ensure that the unit "knows" where the capacitors are at and also there is a physical HF/LF
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| switch in the platen matching which only changes during the stabilisation...i.e. a HF process run with no
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| stabilisation after a LF process would have the platen matching switch still set to LF. Without stabilisation,
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| there are likely to be matching issues on the coil and possibly on the platen depending on previous process
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| run.
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| It is expected to see a reflected power spike at the start of the process as the plasma is being struck;
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| provided that this spike comes down very quickly there is usually no issue. Also, it is important that the
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| matching start points are set ~5% away from the "sweet spot" to ensure that the matching is repeatable run-
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| to-run during the transient phase as the plasma strikes; if the matching is not set up well, then it is a matter
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| of luck.....some runs will strike well, others will not.
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| Q02c: Would it be a good idea to run a conditioning run before the wafers and after TDESC cleans. I have tried
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| to make a conditioning recipe with a ramping step where the coil power is ramped from 300 to 800 W in 30
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| seconds in order for the matching unit to find the sweet spot more easily before a 'non-ramped' step.
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| A02c: Provided usual inter-wafer (waferless) clean protocol is followed, there should be no need for specific
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| conditioning runs. It may be worth running a few minutes of the desired process when switching from a very
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| different process window but there should be little/no difference provided a 3minute interwafer clean is run
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| immediately before any process run. To clarify:
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| In "development mode" (only few-several runs per day) 3minute clean before the process run is
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| needed.
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| In "production mode" (continuous running of batch processes), 3minute clean at the very start followed
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| by interwafer clean
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| (time of interwafer clean should follow a rough rule of thumb of ~3s clean/minute of actual
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| processing + ~10% if process time is longer than a few minutes, otherwise, for very short processes a
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| batch clean of ~30minutes to 1hr depending on duration of batch process).
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| Q02d: My colleague Berit who is working hard to find the right Cr etch on our ICP metal etcher has just been
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| informed that due to the usage of the '10% range' option on the platen power her processes have been
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| running with 10 times as much platen power as intended. In my experiments so far I have seen that the 100
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| nm of ZEP resist is gone after 30 seconds of processing...
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| A02d: I'm not sure of the details on the metal etcher. On the Pegasus, selecting 10% range will limit the range
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| to 30W, selecting "full" will allow up to 300W. You are running 50W with this process - the range should
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| be set to full. If running <30W, then setting full range will not deliver 10x more power than requested, just
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| that the control of fwd power will not be as accurate as if 10% range is selected (i.e. 0-5V = 0-30W in 10%
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| range, 0-5V = 0-300W in full range). I think that on the metal etcher there is an issue due to the different
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| platen generator. It is worth double-checking the generator display on the Pegasus when running low
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| power and 10% range selected as this is a combination not very often used.
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| 100nm of ZEP resist is not much and it is feasible to think that this is stripping off in 30s of process time. ZEP
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| resist will show a much lower selectivity than standard resist. The conditions are going to be quite hard on
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| the mask - low pressure and relatively high platen power. Use of ZEP resist and the process conditions you
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| are running is very rare in the Pegasus - it is difficult to say what you should expect to see.
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| How is the 2" wafer bonded to the carrier and what is the carrier? If thermal bonding is not good such that
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| the cooling is lost or not efficient, then there will be lack of deposition on the mounted wafer resulting in
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| low selectivity.
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| Q02e: I have attached the recipes that I am using - can you find any bad parameters?
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| A02e: Aside from the lack of stabilisation in some of the recipes and use of 10% range in platen power (which
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| will probably limit forward power to 30W when demand is 50W), I cannot see anything wrong with the
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| processes.
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