Specific Process Knowledge/Etch/Etching of Silicon Oxide/SiO2 etch using ASE/ICP recipe for SiO2: Difference between revisions

From LabAdviser
Jump to navigation Jump to search
No edit summary
 
(45 intermediate revisions by the same user not shown)
Line 1: Line 1:
''' ''Unless otherwise stated, all content in this section was done by Maria Farinha@DTU Nanolab, May 2023'' '''
This recipe was taken from the ICP Metal etch, with a slight difference in the platen temperature.
This recipe was taken from the ICP Metal etch, with a slight difference in the platen temperature.


{| border="1" cellspacing="2" cellpadding="2"  
{| border="1" cellspacing="2" cellpadding="2"  
|-style="background:Black; color:White"
|-style="background:Black; color:White"
! Parameter
! Parameter
|Recipe name: '''1SiO2_02'''  
|Recipe name: '''SiO2_ICP'''  
|Recipe name: '''1SiO2_03 '''
|Testing other settings to increase etch rate in nitride
|-
|-
|Coil Power [W]
|Coil Power [W]
|150
|1000
|100
|150
|-
|-
|Platen Power [W]
|Platen Power [W]
|25
|200
|25
|25
|-
|-
|Platen temperature [<sup>o</sup>C]
|Platen temperature [<sup>o</sup>C]
|20
|20
|20
|20
|-
|-
|C<sub>4</sub>F<sub>8</sub> flow [sccm]
|C<sub>4</sub>F<sub>8</sub> flow [sccm]
|36
|10
|10
|20
|-
|-
|H<sub>2</sub> flow [sccm]
|H<sub>2</sub> flow [sccm]
|13
|28
|10
|0
|-
|He flow [sccm]
|0
|100
|100
|-
|-
|Pressure [mTorr]
|Pressure [mTorr]
|2.5
|2.5
|2.5
|2.5
|-
|-
|}
|}


====Results when etching a piece of wafer on a Si carrier ====
====Results with a ''non-patterned wafer''====


{| border="2" cellspacing="2" cellpadding="3"
{| border="2" cellspacing="2" cellpadding="3"
|-style="background:DarkGray; color:White"
|-style="background:DarkGray; color:White"
!Material to be etched
!Recipe
!Recipe: 1SiO2_02 <span style="background:#FFD700">'''*This recipe is no longer stable.'''</span>
!Recipe: SIO2_ICP
!Recipe: 1SiO2_03
!SIO2_ICP on stoic Nit
!Testing other settings to increase etch rate in nitride
!SIO2_ICP on low-stress Nit
|-
|-
|Etch rate in SiO2
|Etch rate
|22.1 nm/min
|121 nm/min  
|26.8 nm/min
(18.07.2023 mfarin @ DTU nanolab)
|?
|194 nm/min  
|-
(24.05.2023 mfarin @ DTU nanolab)
|Etch rate in PECVD nitride
|190 nm/min  
|.
(24.05.2023 mfarin @ DTU nanolab)
|20.8nm/min (''kabi@nanolab 20190301'') - ~0nm/min (''ecsj@nanolab 20210729'')
|?
|-
|Etch rate in LPCVD nitride
|.
|only around 6 nm/min (20190820)
|23.7 nm/min in the middle, 17 nm/min close to the edge
|-
|Etch rate in resist (MIR)
|12.5 nm/min
|13.9 nm/min
|Not tested properly (still more than 1 µm left (1.5µm MIR) after 12 min
|-
|Selectivity (SiO2:resist)
|1.8
|1.9
|?
|-
|-


|Etch rate in silicon
|
|
*4 nm/min in the middle of the wafer (80% load) bghe@Nanolab 20190117
*2-3 nm/min at the edge of the wafer (80% load) bghe@Nanolab 20190117
|
|-
|Profile Images


|[[File:SiO2ICP26_03.jpg|200px]] [[File:SiO2ICP26_05.jpg|200px]] [[File:SiO2ICP26_07.jpg|200px]]
|[[File:SiO2ICP33_01.jpg|200px]][[File:SiO2ICP33_03.jpg|200px]][[File:SiO2ICP33_05.jpg|200px]]
|Profile not analyzed
|-
|}
|}


<br clear="all" />
====Results with a ''patterned wafer'' ====
 
====Results when etching a whole wafer on an Al carrier ====
 
{| border="2" cellspacing="2" cellpadding="3"
|-style="background:DarkGray; color:White"
!Material to be etched
!Recipe: SiO2_ICP
|-
|Etch rate in SiO2
|22.1 nm/min
|-
|Etch rate in resist (MIR)
|16.6 nm/min
|-
|Selectivity (SiO2:resist)
|1.3
|-
|Profile Images
 
|[[File:SiO2ICP29_01.jpg|200px]][[File:SiO2ICP29_03.jpg|200px]][[File:SiO2ICP29_05.jpg|200px]]
 
 
|-
|}
 
<br clear="all" />


{| border="2" cellspacing="2" cellpadding="3"
{| border="2" cellspacing="2" cellpadding="3"
Line 128: Line 55:
!Material to be etched
!Material to be etched
!Recipe: SIO2_ICP
!Recipe: SIO2_ICP
!Testing othe etch rate in nitride
!SIO2_ICP on stoic Nit
!SIO2_ICP on low-stress Nit
!SIO2_ICP on Si
|-
|-
|Etch rate in SiO2
|Etch rate in SiO2
|22.1 nm/min
|155 nm/min in the center, 125nm/min in the edges
|?
(03052023 mfarin @ DTU nanolab)
|
|
|
|-
|-
|Etch rate in PECVD nitride
|Etch rate in resist (AZ 5214E)
|.
|108 nm/min in the center, 98nm/min in the edges
|20.8nm/min (''kabi@nanolab 20190301'') - ~0nm/min (''ecsj@nanolab 20210729'')
(03052023 mfarin @ DTU nanolab)
|-
|
|Etch rate in LPCVD nitride
|
|.
|
|23.7 nm/min in the middle, 17 nm/min close to the edge
|-
|Etch rate in resist (MIR)
|12.5 nm/min
|13.9 nm/min
|-
|-
|Selectivity (SiO2:resist)
|Selectivity (SiO2:resist)
|1.8
|1.45
|1.9
|
|
|
|-
|-


Line 154: Line 83:
|
|
|
|
*4 nm/min in the middle of the wafer (80% load) bghe@Nanolab 20190117
|
*2-3 nm/min at the edge of the wafer (80% load) bghe@Nanolab 20190117
|
|-
|-
|Profile Images
|Profile Images


|[[File:SiO2_ICP.2-top-02.png|300px]]
[[File:SiO2_ICP.2-top-04.png|300px]]
|
|
|
|
|
|-
|-
|}
|}
 
*More tests will be done regarding silicon and silicon nitride, since this recipe can be used for overetch.
<br clear="all" />
<br clear="all" />

Latest revision as of 15:25, 18 July 2023

Unless otherwise stated, all content in this section was done by Maria Farinha@DTU Nanolab, May 2023

This recipe was taken from the ICP Metal etch, with a slight difference in the platen temperature.

Parameter Recipe name: SiO2_ICP
Coil Power [W] 1000
Platen Power [W] 200
Platen temperature [oC] 20
C4F8 flow [sccm] 10
H2 flow [sccm] 28
Pressure [mTorr] 2.5

Results with a non-patterned wafer

Recipe Recipe: SIO2_ICP SIO2_ICP on stoic Nit SIO2_ICP on low-stress Nit
Etch rate 121 nm/min

(18.07.2023 mfarin @ DTU nanolab)

194 nm/min

(24.05.2023 mfarin @ DTU nanolab)

190 nm/min

(24.05.2023 mfarin @ DTU nanolab)

Results with a patterned wafer

Material to be etched Recipe: SIO2_ICP SIO2_ICP on stoic Nit SIO2_ICP on low-stress Nit SIO2_ICP on Si
Etch rate in SiO2 155 nm/min in the center, 125nm/min in the edges

(03052023 mfarin @ DTU nanolab)

Etch rate in resist (AZ 5214E) 108 nm/min in the center, 98nm/min in the edges

(03052023 mfarin @ DTU nanolab)

Selectivity (SiO2:resist) 1.45
Etch rate in silicon
Profile Images SiO2 ICP.2-top-02.png

SiO2 ICP.2-top-04.png

  • More tests will be done regarding silicon and silicon nitride, since this recipe can be used for overetch.