Specific Process Knowledge/Etch/Etching of Silicon: Difference between revisions

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Etch of silicon can be done by either wet etch or dry etch. The standard setups for this here at DANCHIP are:
'''Unless anything else is stated, everything on this page, text and pictures are made by DTU Nanolab.'''
===Wet etches:===
*[[Specific Process Knowledge/Etch/KOH Etch|KOH Etch]]
*[[Specific Process Knowledge/Etch/Wet Polysilicon Etch|Wet PolySilicon etch]]
 
===Dry etches:===
*[[/Si etch using RIE1 or RIE2|Dry etch using RIE1 or RIE2]]
*[[/Si etch using ASE|ASE (Advanced Silicon Etch)]]
*[[Specific Process Knowledge/Etch/DRIE-Pegasus|DRIE-Pegasus (Silicon Etch)]]
*[[Specific Process Knowledge/Etch/IBE⁄IBSD Ionfab 300/IBE Si etch|IBE/IBSD Ionfab 300]]
 
==Comparison of KOH etch, wet PolySilicon etch, RIE etch, ASE etch and DRIE-Pegasus for etching of Silicon==
{| border="2" cellspacing="0" cellpadding="5" align="center"
!
! KOH
! PolySilicon etch
! RIE
! ASE
! DRIE-Pegasus
|- valign="top"
|'''General description'''
|
*Anisotropic etch in the (100)-plan
*High selectivity to the other plans
|
*Isotropic etch in Silicon and Polysilicon
|
*Can etch isotropic and anisotropic depending on the process parameters
*Anisotropic etch: vertical sidewalls independent of the crystal plans
|
*As RIE but better for high aspect ratio etching and deep etches (higher etch rate)
*Good selectivity to photoresist
|
*State-of-the-art dry silicon etcher with atmospheric cassette loader
*Extremely high etch rate and advanced processing options
|-valign="top"
|'''Possible masking materials'''
|
*Silicon Nitride
*Silicon Oxide
|
*Photoresist
|
*Photoresist
*E-beam resist
*Silicon Oxide
*Silicon Nitride
*Aluminium
*Chromium (ONLY RIE2!)
*Other metals if they cover less than 5% of the wafer area (ONLY RIE2!)
|
*Photoresist
*Silicon Oxide
*Silicon Nitride
*Aluminium
|
*Photoresist and zep resist
*Silicon Oxide
*Silicon Nitride
*Aluminium oxide
|- valign="top"
|'''Etch rate'''
|
*Si(100) @80<sup>o</sup>C: 1.29+0.05 µm/min
*Si(100) @70<sup>o</sup>C: ~0.7 µm/min
*Si(100) @60<sup>o</sup>C: ~0.4 µm/min
|
*~100-200 nm/min, highly dependent on doping level
|
*<40nm/min to >600nm/min depending on recipe parameters and mask design
|
*<130nm/min to >5.6 µm/min depending on recipe, mask design and aspect ratio.
|
*Up to 18-20 µm/min depending on recipe, mask design and aspect ratio.
|-valign="top"
|'''Size of substrate'''
|
*4" in our standard bath
*4", 2" in "Fumehood KOH"
|
*4" in our standard bath
|
*4" (or smaller with carrier)
|
*6" (when it is set up for 6") and 4" (or smaller if you have a carrier)
|
*6" (when it is set up for 6") and 4" (or smaller if you have a carrier)
|-valign="top"
|'''Batch size'''
|
*25 wafers at a time
*1-5 wafers in "Fumehood KOH"
|
*25 wafers at a time
|
*One wafer at a time
|
*One wafer at a time
|
*One wafer at a time but you can load a whole batch of 25 wafers and set up an individual for each one
|-valign="top"
|'''Allowed materials'''
|
*Silicon
*Silicon Oxide
*Silicon Nitride
*Silicon Oxynitride
*Other materials (only in "Fumehood KOH")
|
*Silicon
*Silicon Oxide
*Silicon Nitride
*Silicon Oxynitride
*Photoresist
|
*Silicon
*Silicon Oxide
*Silicon Nitride
*Silicon Oxynitride
*Photoresist
*E-beam resist
*Aluminium
*Chromium (ONLY RIE2!)
*Other metals if they cover less than 5% of the wafer area (ONLY RIE2!)
|
*Silicon
*Silicon Oxide
*Silicon Nitride
*Silicon Oxynitride
*Photoresist
*E-beam resist
*Aluminium
|
*Silicon
*Silicon Oxide
*Silicon Nitride
*Silicon Oxynitride
*Photoresist
*zep resist
*Aluminium oxide
|-


|}
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=This Part is under construction=
'''Feedback to this page''': '''[mailto:labadviser@nanolab.dtu.dk?Subject=Feed%20back%20from%20page%20http://labadviser.nanolab.dtu.dk/index.php?title=Specific_Process_Knowledge/Etch/Etching_of_Silicon click here]'''
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<!--Page reviewed by jmli 9/8-2022  -->
== Comparing silicon etch methods ==


'''Feedback to this page''': '''[mailto:labadviser@danchip.dtu.dk?Subject=Feed%20back%20from%20page%20http://labadviser.danchip.dtu.dk/index.php?title=Specific_Process_Knowledge/Etch/Etching_of_Silicon click here]'''
There are a broad variety of silicon etch methods at DTU Nanolab The methods are compared here to make it easier for you to compare and choose the one that suits your needs.  
<!-- Replace "http://labadviser.danchip.dtu.dk/..." with the link to the Labadviser page-->
 
== Comparing silicon etch methodes at Danchip [[Image:section under construction.jpg|70px]]==
 
There are a broad varity of silicon etch methodes at Danchip. The methodes are compared here to make it easier for you to compare and choose the one that suits your needs.  


===Wet etches:===
===Wet etches:===
*[[Specific Process Knowledge/Etch/KOH Etch|KOH Etch]]
*[[Specific Process Knowledge/Etch/KOH Etch|Si Etch: KOH]]
*[[Specific Process Knowledge/Etch/Wet Polysilicon Etch|Wet PolySilicon etch]]
*[[Specific Process Knowledge/Etch/Wet Polysilicon Etch|Wet PolySilicon etch]]


===Dry etches:===
===Dry etches:===
*[[/Si etch using RIE1 or RIE2|Dry etch using RIE1 or RIE2]]
*[[/Si etch using ASE|Si etch using ASE (Advanced Silicon Etch)]]
*[[/Si etch using ASE|ASE (Advanced Silicon Etch)]]
*[[Specific Process Knowledge/Etch/DRIE-Pegasus|Si etch using DRIE-Pegasus (Silicon Etch)]]
*[[Specific Process Knowledge/Etch/DRIE-Pegasus|DRIE-Pegasus (Silicon Etch)]]
*[[Specific Process Knowledge/Etch/IBE&frasl;IBSD Ionfab 300/IBE Si etch|Si etch using IBE/IBSD Ionfab 300]]
*[[Specific Process Knowledge/Etch/IBE&frasl;IBSD Ionfab 300|IBE/IBSD Ionfab 300]]


==Compare the methodes for Si etching==
==Compare the methods for Si etching==


{|border="1" cellspacing="1" cellpadding="3" style="text-align:left;"  
{|border="1" cellspacing="1" cellpadding="3" style="text-align:left;"  
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|-style="background:silver; color:black"
|-style="background:silver; color:black"
!
!
![[Specific Process Knowledge/Etch/KOH Etch|KOH Etch]]
![[Specific Process Knowledge/Etch/KOH Etch|Si Etch]]
![[Specific Process Knowledge/Etch/Wet Polysilicon Etch|Wet PolySilicon etch]]
![[Specific Process Knowledge/Etch/Wet Polysilicon Etch|Wet PolySilicon etch]]
![[Specific Process Knowledge/Etch/RIE (Reactive Ion Etch)|RIE (Reactive Ion Etch)]]
![[Specific Process Knowledge/Etch/DRIE-Pegasus|DRIE-Pegasus (Deep Reactive Ion Etch)]]
![[Specific Process Knowledge/Etch/DRIE-Pegasus|DRIE-Pegasus (Silicon Etch)]]
![[Specific Process Knowledge/Etch/ASE (Advanced Silicon Etch)|ASE (Advanced Silicon Etch)]]
![[Specific Process Knowledge/Etch/ASE (Advanced Silicon Etch)|ASE (Advanced Silicon Etch)]]
![[Specific Process Knowledge/Etch/ICP Metal Etcher|ICP Metal Etch]]
![[Specific Process Knowledge/Etch/ICP Metal Etcher|ICP Metal Etch]]
Line 184: Line 41:
!Generel description
!Generel description
|
|
*Anisotropic etch in the (100)-plan
*Anisotropic etch in crystalline silicon
*High selectivity to the other plans
*High selectivity to the {111}-planes
*Anisotropic etch: vertical sidewalls independent of the crystal plans
|
*Isotropic etch in Silicon and Polysilicon
|
|
*Can etch isotropic and anisotropic depending on the process parameters
*Isotropic etch in crystalline silicon and polysilicon
|
|
*State-of-the-art dry silicon etcher with atmospheric cassette loader
*State-of-the-art dry silicon etcher with atmospheric cassette loader
*Good selectivity to photoresist
*Extremely high etch rate and advanced processing options
*Extremely high etch rate and advanced processing options
|
|
*As RIE but better for high aspect ratio etching and deep etches (higher etch rate)
*Can etch isotropic and anisotropic depending on the process parameters and mask design
*Good selectivity to photoresist
*Good selectivity to photoresist
*The ASE open for same metal on the samples and SiO2 etching, which can affect the Si etch stability.
|
|
*
*This is dedicated to metal etch. So fare only Si etch of nanostructures has been explored on the system.
|
|
*Primarily for pure physical etch by sputtering with Ar-ions
*Primarily for pure physical etch by sputtering with Ar-ions
Line 210: Line 66:
*Silicon Oxide
*Silicon Oxide
|
|
*Photoresist
*Photo-, DUV- and e-beamresist
|
*Photoresist
*E-beam resist
*E-beam resist
*Silicon Oxide
*Silicon Oxide
Line 220: Line 74:
*Other metals if they cover less than 5% of the wafer area (ONLY RIE2!)
*Other metals if they cover less than 5% of the wafer area (ONLY RIE2!)
|
|
*Photoresist and zep resist
*Photo-, DUV- and e-beamresist
*Silicon Oxide
*Silicon Oxide
*Silicon Nitride
*Silicon Nitride
*Aluminium oxide
*Aluminium oxide
|
|
*Photoresist
*Photo-, DUV- and e-beamresist
*Silicon Oxide
*Silicon Oxide
*Silicon Nitride
*Silicon Nitride
Line 249: Line 103:
|
|
*~100-200 nm/min, highly dependent on doping level
*~100-200 nm/min, highly dependent on doping level
|
*<40nm/min to >600nm/min depending on recipe parameters and mask design
|
|
*Up to 18-20 µm/min depending on recipe, mask design and aspect ratio.
*Up to 18-20 µm/min depending on recipe, mask design and aspect ratio.
Line 256: Line 108:
*<130nm/min to >5.6 µm/min depending on recipe, mask design and aspect ratio.
*<130nm/min to >5.6 µm/min depending on recipe, mask design and aspect ratio.
|
|
*
*Process dependent. The nano etch is in the range 59-311 nm/min
|
|
*
*Process dependent. Has been tested in the range 17-31 nm/min
|-
|-


Line 265: Line 117:
!Substrate size
!Substrate size
|
|
*25 wafers of 100mm in our 100mm bath
*<nowiki>#</nowiki>25 wafers of 100mm or 150nm in Si Etch 1 & 2
*1-5 wafers of 100mm or 50mm in "Fumehood KOH"
*<nowiki>#</nowiki>25 wafers of 100mm or 150nm and smaller samples in Si Etch 3 (fume hood)
*25 wafers of 100mm or 150mm in our 6" bath
|
|
*<nowiki>#</nowiki>25 100 mm wafers in our 100mm bath
*<nowiki>#</nowiki>#25 wafers of 100mm or 150nm mm wafers  
|
|
*As many small samples as can be fitted on the 100mm carrier.
*As many small samples as can be fitted on the 100mm carrier.
*1 100mm wafer (or smaller with carrier)
*<nowiki>#</nowiki>1 100mm wafer (or smaller with carrier)
*1 150mm wafer (only when the system is set up for 150mm)  
*<nowiki>#</nowiki>1 150mm wafer (only when the system is set up for 150mm)  
|
|
*As many small samples as can be fitted on a 100mm wafer
*As many small samples as can be fitted on a 100mm wafer
*1 50 mm wafer fitted on a 100mm wafer
*<nowiki>#</nowiki>1 50 mm wafer fitted on a 100mm wafer
*1 100 mm wafer
*<nowiki>#</nowiki>1 100 mm wafer
*1 150 mm wafers (only when the system is set up to 150mm)  
*<nowiki>#</nowiki>1 150 mm wafers (only when the system is set up to 150mm)  
|
|
*As many small samples as can be fitted on a 100mm wafer
*As many small samples as can be fitted on a 150mm wafer
*1 50 mm wafer fitted on a 100mm wafer
*<nowiki>#</nowiki>5 50 mm wafers fitted on a 150mm wafer
*1 100 mm wafer
*<nowiki>#</nowiki>1 100 mm wafer on a 150mm wafer
*1 150 mm wafers (only when the system is set up to 150mm)
*<nowiki>#</nowiki>1 150 mm wafers (The system is normally set up to 150mm)  
|
*As many small samples as can be fitted on a 100mm wafer
*1 50 mm wafer fitted on a 100mm wafer
*1 100 mm wafer
*1 150 mm wafers (only when the system is set up to 150mm)  
|
|
*As many samples as can be securely fitted on a up to 200mm wafer
*As many samples as can be securely fitted on a up to 200mm wafer
*1 50 mm wafer
*<nowiki>#</nowiki>1 50 mm wafer with special carrier
*1 100 mm wafer
*<nowiki>#</nowiki>1 100 mm wafer with special carrier
*1 150 mm wafers  
*<nowiki>#</nowiki>1 150 mm wafers with special carrier
*1 200 mm wafer
*<nowiki>#</nowiki>1 200 mm wafer
|-
|-
|-style="background:WhiteSmoke; color:black"
|-style="background:WhiteSmoke; color:black"
!'''Allowed materials'''
!'''Allowed materials'''
|
|
*Allowed material 1
*Silicon
*Allowed material 2
*Silicon Oxide
*Silicon Nitride
*Silicon Oxynitride
*Other materials (only in "Si Etch 3 (fume hood))
|
|
*Allowed material 1
*Silicon
*Allowed material 2
*Silicon Oxide
*Allowed material 3
*Silicon Nitride
*Silicon Oxynitride
*Photoresist
|
|
*Allowed material 1
*Silicon
*Silicon Oxide
*Silicon Nitride
*Silicon Oxynitride
*Photo-, DUV- and e-beamresist
*Aluminium oxide
*Quartz/fused silica
|
*Silicon
*Silicon Oxide
*Silicon Nitride
*Silicon Oxynitride
*Photo-, DUV- and e-beamresist
*Aluminium
*Quartz/fused silica
*Other metals if they cover less than 5% of the wafer area
|
|
*Allowed material 1
*Silicon
*Allowed material 2
*Photo-, DUV- and e-beamresist
*Allowed material 3
*PolySilicon
*Silicon oxide
*Silicon (oxy)nitride
*Aluminium
*Titanium
*Chromium
*Quartz/fused silica
|
|
*Allowed material 1
*Silicon
*Allowed material 2
*Silicon oxides
*Allowed material 3
*Silicon (oxy)nitrides
*Metals from the +list
*Metals from the -list
*Alloys from the above list
*Stainless steel
*Glass
*III-V materials
*Resists
*Polymers
*Capton tape
|-
|-
|}
|}


<br clear="all" />
<br clear="all" />

Latest revision as of 16:07, 6 February 2023

Unless anything else is stated, everything on this page, text and pictures are made by DTU Nanolab.

All links to Kemibrug (SDS) and Labmanager Including APV and QC requires login.

Feedback to this page: click here

Comparing silicon etch methods

There are a broad variety of silicon etch methods at DTU Nanolab The methods are compared here to make it easier for you to compare and choose the one that suits your needs.

Wet etches:

Dry etches:

Compare the methods for Si etching

Si Etch Wet PolySilicon etch DRIE-Pegasus (Deep Reactive Ion Etch) ASE (Advanced Silicon Etch) ICP Metal Etch IBE/IBSD Ionfab 300
Generel description
  • Anisotropic etch in crystalline silicon
  • High selectivity to the {111}-planes
  • Isotropic etch in crystalline silicon and polysilicon
  • State-of-the-art dry silicon etcher with atmospheric cassette loader
  • Good selectivity to photoresist
  • Extremely high etch rate and advanced processing options
  • Can etch isotropic and anisotropic depending on the process parameters and mask design
  • Good selectivity to photoresist
  • The ASE open for same metal on the samples and SiO2 etching, which can affect the Si etch stability.
  • This is dedicated to metal etch. So fare only Si etch of nanostructures has been explored on the system.
  • Primarily for pure physical etch by sputtering with Ar-ions
Possible masking materials
  • Silicon Nitride
  • Silicon Oxide
  • Photo-, DUV- and e-beamresist
  • E-beam resist
  • Silicon Oxide
  • Silicon Nitride
  • Aluminium
  • Chromium (ONLY RIE2!)
  • Other metals if they cover less than 5% of the wafer area (ONLY RIE2!)
  • Photo-, DUV- and e-beamresist
  • Silicon Oxide
  • Silicon Nitride
  • Aluminium oxide
  • Photo-, DUV- and e-beamresist
  • Silicon Oxide
  • Silicon Nitride
  • Aluminium
  • Photo-, DUV- and e-beamresist
  • Silicon Oxide
  • Silicon Nitride
  • Aluminium
  • Cr
  • Ti
  • Any material that is accepted in the machine
Etch rate range
  • Si(100) @80oC: 1.29+0.05 µm/min
  • Si(100) @70oC: ~0.7 µm/min
  • Si(100) @60oC: ~0.4 µm/min
  • ~100-200 nm/min, highly dependent on doping level
  • Up to 18-20 µm/min depending on recipe, mask design and aspect ratio.
  • <130nm/min to >5.6 µm/min depending on recipe, mask design and aspect ratio.
  • Process dependent. The nano etch is in the range 59-311 nm/min
  • Process dependent. Has been tested in the range 17-31 nm/min
Substrate size
  • #25 wafers of 100mm or 150nm in Si Etch 1 & 2
  • #25 wafers of 100mm or 150nm and smaller samples in Si Etch 3 (fume hood)
  • ##25 wafers of 100mm or 150nm mm wafers
  • As many small samples as can be fitted on the 100mm carrier.
  • #1 100mm wafer (or smaller with carrier)
  • #1 150mm wafer (only when the system is set up for 150mm)
  • As many small samples as can be fitted on a 100mm wafer
  • #1 50 mm wafer fitted on a 100mm wafer
  • #1 100 mm wafer
  • #1 150 mm wafers (only when the system is set up to 150mm)
  • As many small samples as can be fitted on a 150mm wafer
  • #5 50 mm wafers fitted on a 150mm wafer
  • #1 100 mm wafer on a 150mm wafer
  • #1 150 mm wafers (The system is normally set up to 150mm)
  • As many samples as can be securely fitted on a up to 200mm wafer
  • #1 50 mm wafer with special carrier
  • #1 100 mm wafer with special carrier
  • #1 150 mm wafers with special carrier
  • #1 200 mm wafer
Allowed materials
  • Silicon
  • Silicon Oxide
  • Silicon Nitride
  • Silicon Oxynitride
  • Other materials (only in "Si Etch 3 (fume hood))
  • Silicon
  • Silicon Oxide
  • Silicon Nitride
  • Silicon Oxynitride
  • Photoresist
  • Silicon
  • Silicon Oxide
  • Silicon Nitride
  • Silicon Oxynitride
  • Photo-, DUV- and e-beamresist
  • Aluminium oxide
  • Quartz/fused silica
  • Silicon
  • Silicon Oxide
  • Silicon Nitride
  • Silicon Oxynitride
  • Photo-, DUV- and e-beamresist
  • Aluminium
  • Quartz/fused silica
  • Other metals if they cover less than 5% of the wafer area
  • Silicon
  • Photo-, DUV- and e-beamresist
  • PolySilicon
  • Silicon oxide
  • Silicon (oxy)nitride
  • Aluminium
  • Titanium
  • Chromium
  • Quartz/fused silica
  • Silicon
  • Silicon oxides
  • Silicon (oxy)nitrides
  • Metals from the +list
  • Metals from the -list
  • Alloys from the above list
  • Stainless steel
  • Glass
  • III-V materials
  • Resists
  • Polymers
  • Capton tape