Specific Process Knowledge/Etch/Etching of Silicon Oxide/SiO2 etch using AOE/Standard recipe with resist mask/SiO2 etch with DUV mask: Difference between revisions
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<gallery caption="Etch of Thermal silicon oxide with DUV KRF resist as mask. Made by BGHE February 2015 " widths="300px" heights="250px" perrow="3"> | <gallery caption="Etch of Thermal silicon oxide with DUV KRF resist as mask. Made by BGHE@Nanolab February 2015 " widths="300px" heights="250px" perrow="3"> | ||
image:DUV_ox_02_5min 12.jpg|Profile of SiO2 lines etched for 5min with SiO2_res in the AOE | image:DUV_ox_02_5min 12.jpg|Profile of SiO2 lines etched for 5min with SiO2_res in the AOE | ||
Revision as of 15:55, 25 January 2019
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- Etch of Thermal silicon oxide with DUV KRF resist as mask. Made by BGHE@Nanolab February 2015
Profile of SiO2 lines etched for 5min with SiO2_res in the AOE
Profile of SiO2 lines etched for 5min with SiO2_res in the AOE, vertical sidewalls, 1µm pitch
Profile of SiO2 lines etched for 5min with SiO2_res in the AOE, vertical sidewalls, 4µm pitch
Bird view of 1µm pitch SiO2 lines, some roughness is seem
Profile of SiO2 lines etched for 5min with SiO2_res in the AOE, all resist is gone and it has been etched a little down in the Si.
Profile of SiO2 lines etched for 5min with SiO2_res in the AOE, all resist is gone and it has been etched a little down in the Si.
