Specific Process Knowledge/Etch/Etching of Silicon Oxide/SiO2 etch using RIE1 or RIE2/Images of 1SIO2mbr with burned resist mask: Difference between revisions
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'''Feedback to this page''': '''[mailto:labadviser@danchip.dtu.dk?Subject=Feed%20back%20from%20page%20http://labadviser.danchip.dtu.dk/index.php/Specific_Process_Knowledge/Etch/Etching_of_Silicon_Oxide/SiO2_etch_using_RIE1_or_RIE2/Images_of_1SIO2mbr_with_burned_resist_mask click here]''' | '''Feedback to this page''': '''[mailto:labadviser@danchip.dtu.dk?Subject=Feed%20back%20from%20page%20http://labadviser.danchip.dtu.dk/index.php/Specific_Process_Knowledge/Etch/Etching_of_Silicon_Oxide/SiO2_etch_using_RIE1_or_RIE2/Images_of_1SIO2mbr_with_burned_resist_mask click here]''' | ||
=<span style="color:#FF0000"> Both RIE's (RIE1 and RIE2) for silicon based etching has been decommissioned </span> = | |||
===Etch of SiO2 using the recipe 1SIO2mbr with burned resist as masking material === | ===Etch of SiO2 using the recipe 1SIO2mbr with burned resist as masking material === | ||
Revision as of 14:57, 7 May 2018
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Both RIE's (RIE1 and RIE2) for silicon based etching has been decommissioned
Etch of SiO2 using the recipe 1SIO2mbr with burned resist as masking material
Berit Geilman Herstrøm (BGE) from Danchip@DTU
