Specific Process Knowledge/Etch/Etching of Silicon Oxide/SiO2 etch using ASE: Difference between revisions
Jump to navigation
Jump to search
THIS PAGE IS UNDER CONSTRUCTION
Line 5: | Line 5: | ||
*Development work: SiO2 etch with resist mask, sample on carrier (Si carrier), see here [[ | *Development work: SiO2 etch with resist mask, sample on carrier (Si carrier), see here [[Media:ASE SiO2 etch on carrier ICP C4F8 H2 no He rev02.pdf]]. Zoom in on the images to see them better (Ctrl + "+") | ||
*Please ask Berit Herstrøm for help with SiO2 etching. | *Please ask Berit Herstrøm for help with SiO2 etching. |
Revision as of 11:54, 5 April 2018
Feedback to this page: click here
THIS PAGE IS UNDER CONSTRUCTION![Under construction.png](/images/thumb/f/f8/Under_construction.png/200px-Under_construction.png.jpeg)
- Development work: SiO2 etch with resist mask, sample on carrier (Si carrier), see here Media:ASE SiO2 etch on carrier ICP C4F8 H2 no He rev02.pdf. Zoom in on the images to see them better (Ctrl + "+")
- Please ask Berit Herstrøm for help with SiO2 etching.