Specific Process Knowledge/Thin film deposition/Deposition of Silicon Oxide/IBSD of SiO2: Difference between revisions
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===Uniformity and break down voltage ''by Mathias Engholm 2016-11-29''=== | ===Uniformity and break down voltage ''by Mathias Engholm 2016-11-29''=== | ||
Mathias made 105.62nm SiO2 on a test silicon wafer and on his sample wafer. The sample wafer had gold/Cr on the surface and that had to be electrically isolated. The uniformity over the wafer of the oxide was 0.19% over 9 points - this is better than he has achieved when oxidizing in a furnace. He anodic bonded the wafer without problems. He measured the breakdown voltage and got 0.82+/+ 0.13 V/nm over 24 points. This is just as good as the oxide from the furnaces. Before his deposition he ran a 20min heat up and 40min dummy deposition to clean the target. This was done with a bright new target and with the small deposition grids mounted.<br> | Mathias made 105.62nm SiO2 on a test silicon wafer and on his sample wafer. The sample wafer had gold/Cr on the surface and that had to be electrically isolated. The uniformity over the wafer of the oxide was 0.19% over 9 points - this is better than he has achieved when oxidizing in a furnace. He anodic bonded the wafer without problems. He measured the breakdown voltage and got 0.82+/+ 0.13 V/nm over 24 points. This is just as good as the oxide from the furnaces. Before his deposition he ran a 20min heat up and 40min dummy deposition to clean the target. This was done with a bright new target and with the small deposition grids mounted.<br> | ||
[[File:breakdownvoltage.png|thumb| | [[File:breakdownvoltage.png|thumb|left|400px| Breakdown voltage over the wafer, ''by Mathias Engholm 2016-11-29'']] | ||
[[File:Ibsd uniformity SiO2.jpg|thumb|500px| Thickness uniformity over the wafer, ''by Mathias Engholm 2016-11-29'']]<br> | [[File:Ibsd uniformity SiO2.jpg|thumb|none|500px| Thickness uniformity over the wafer, ''by Mathias Engholm 2016-11-29'']]<br> | ||
Revision as of 15:50, 30 November 2016
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Acceptance test for SiO2 deposition (2011):
| . | Acceptance Criteria |
Acceptance Result 1 |
Acceptance Result 2 |
|---|---|---|---|
| Substrate information |
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| Material to be deposited |
The purpose of the SiO2 is to be part of a mirror: <br\> 5 quarterwavelength pairs of <br\> SiO2 <br\> TiO2 <br\> Extra quarterwavelength layer of <br\> TiO2 <br\> 5 quarterwavelength pairs of <br\> SiO2 <br\> TiO2 <br\> Design wavelength (for refractive indices and layer thicknesses): 1300nm <br\> The acceptance criteria is set up for the single SiO2 and TiO2 layers. <br\> Five runs in a row for each material. |
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| Deposition thickness |
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| Deposition rate |
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One standard deviation |
Only made once |
| Thickness uniformity |
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| Reproducibility |
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| Stress |
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| Refractive index | . |
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| Recipe 1 | Recipe 2 | |
|---|---|---|
| Platen angle | 15 degrees | 10 degrees |
| Platen rotation speed | 20rpm | 20rpm |
| Ar(N) flow | 4 sccm | 4 sccm |
| Ar(dep. source) flow | 9 sccm | 8 sccm |
| I(N) | 310mA | 320mA |
| Power | 675W | 700W |
| I(B) | 310mA | 280mA |
| V(B) | 1200V | 1100V |
| Vacc(B) | 400V | 400V |
| Deposition time | 29min | 37min |
Other results
Roughness of the surface
Measured with the Optical profiler - PSI mode (on one sample from the acceptace test): Sa= 0.6nm
Uniformity and break down voltage by Mathias Engholm 2016-11-29
Mathias made 105.62nm SiO2 on a test silicon wafer and on his sample wafer. The sample wafer had gold/Cr on the surface and that had to be electrically isolated. The uniformity over the wafer of the oxide was 0.19% over 9 points - this is better than he has achieved when oxidizing in a furnace. He anodic bonded the wafer without problems. He measured the breakdown voltage and got 0.82+/+ 0.13 V/nm over 24 points. This is just as good as the oxide from the furnaces. Before his deposition he ran a 20min heat up and 40min dummy deposition to clean the target. This was done with a bright new target and with the small deposition grids mounted.
