Specific Process Knowledge/Etch/Etching of Bulk Glass/AOE etching of fused silica

Feedback to this page: click here

Comparison of masking materials and AOE processes etching fused silica

	AZ resist mask	PolySi mask	Cr mask
Generel description	Using a photoresist mask as etching mask is often convenient, since it takes less process steps to make than hard masks. The draw backs using resist as masking material in the AOE on glass is that glass does not transfer heat well and therefore the He cooling in the AOE does not work well on glass substrates. This makes the photoresist turn very hot during the etch and that might burn the resist. Resist also has low selectivity to glass so deep glass etch is not working well with photoresist as masking material.	Using Poly Silicon as masking material in the AOE has the advantage over photoresist in the fact that the mask can stand a higher temperature. Then a recipe with higher etch can be used. It also as a higher selectivity so it is possible to etch deeper.The draw back might be higher line width reduction but this has not been expored yet.	This recipe with a Cr mask gives the highest etch rate, but the wafer uniformity is not so good.
Substrate	Fused silica 100mm	Fused silica 100mm	Fused silica 100mm
Mask material/thickness	AZ resist 4.2µm	PolySi 2µm	Cr 300nm Pattern defined in the ICP metal
Coil Power	1300 W	1300 W	1100W
Platen Power	200 W	500 W	180W
Platen temperature	0oC	60oC	60oC
He flow	174 sccm	300 sccm	0 sccm
C4F8 flow	5 sccm	18 sccm	40 sccm
O2 flow	0 sccm	0 sccm	5 sccm
H2 flow	4 sccm	0 sccm	0 sccm
Pressure	4 mTorr	4 mTorr	6 mTorr
Etch rate in fused silica	193.2±0.4nm/min @5min etch (2013-03-26)(50nm Al on back side) 173.5±0.5nm/min @40min etch (2013-03-13) (100nm Al on back side) 208nm/min @(5+5)min (2013-08-27) (no Al on back side, He pressure 6.8T) Reduced etch rate in long etch might be due to either resist gone at the end, substrate being very hot=>larger polymerization during etch. The polymer/resist left on the wafer after etch was less than 20nm and it looked burned. ± refers to the variation over the wafer.	448.6±0.6nm/min @40min etch (2013-3-26) ± refers to the variation over the wafer.	562nm/min±4.1nm/min @20min etch (2013-6-7)
Selectivity to mask	~1:1.6 (2013-03-26)	~1:16 (2013-03-26)	~1:77 (2013-6-7)
Linewidth reduction		~4µm for this 17.8µm deep etch ~0.22µm/1µm etch depth	~3µm for this 11.6µm deep etch ~0.26µm/1µm etch depth
Substrate size tried	100 mm wafer	100 mm wafer	100 mm wafer
Images		vertical sidewalls Etch profile viewed by SEM - Particulates are from the cleaving process Etch profile viewed by SEM - Particulates are from the cleaving process Etched lines viewed in a tilted angle by SEM - Particulates are from the cleaving process	Bowed sidewalls Etch profile viewed by SEM - Particulates are from the cleaving process Etch profile viewed by SEM - Particulates are from the cleaving process

User results

Joachim Thomsen (student at Nanotech) October 2013

process flow was:

• Fused silica wafers
• Deposition of poly-Si on the wafers: LPCVD poly-Si furnace, recipe poly620, 1h30m: aprox. thickness 700nm
• Adding AZ resist mask
• Etching the poly-Si mask: AOE recipe "si_etch": 30s
• Etching the fused silica: using AOE recipe "m_polysi": 11min10sec