Specific Process Knowledge/Etch/Etching of Silicon Oxide/SiO2 etch using ASE/tests CHF3+H2: Difference between revisions
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=Etch test of Silicon Nitride= | =Etch test of Silicon Nitride= | ||
The nitride layer deposited was 560nm, on the PECVD4 (recipe: Standard HF SiN with wafer clean, for 1h). | The nitride layer deposited was 560nm, on the PECVD4 (recipe: Standard HF SiN with wafer clean, for 1h). <br> | ||
They were patterned with 750 DUV resist and 65nm of BARC (exposure:355 J/m2, focus:-3.1). | They were patterned with 750 DUV resist and 65nm of BARC (exposure:355 J/m2, focus:-3.1). <br> | ||
The following results were processed on chips (2*2cm) bonded to a 100mm dummy wafer. | The following results were processed on chips (2*2cm) bonded to a 100mm dummy wafer. | ||
Revision as of 14:57, 22 April 2024
Tests performed with UV resist:
The tests were performed on a 100mm wafer patterned on MLA3, with 2.2um AZ5214E resist.
Tests performed with DUV resist:
The resist used was a negative DUV resist (UVN) with 915nm + 88nm BARC layer.
2SiO2 test - 5 jan 2024
Tested on chips (2*2cm). The following results were processed on chips bonded to a 100mm wafer. They were patterned with 915 UVN resist (DUV negative) and 65nm of BARC. The SiO2 layer was 2um (deposited on the C1 furnace).
Etch test of Silicon Nitride
The nitride layer deposited was 560nm, on the PECVD4 (recipe: Standard HF SiN with wafer clean, for 1h).
They were patterned with 750 DUV resist and 65nm of BARC (exposure:355 J/m2, focus:-3.1).
The following results were processed on chips (2*2cm) bonded to a 100mm dummy wafer.