Specific Process Knowledge/Etch/DRIE-Pegasus/SOIetch

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SOI

Unless otherwise stated, all content on this page was created by Jonas Michael-Lindhard, DTU Nanolab


Recipe Name Temp. Deposition step Etch step Comments
Time Pres. C4F8 SF6 O2 Coil Time Pres. C4F8 SF6 O2 Coil Platen Showerhead Runs Key words
SOI etch SOI 20 2 25 250 0 0 2000 3 30 0 400 40 2800 75 (0.025s, 75%) Old 1
SOI 20 2 25 250 0 0 2000 3 30 0 400 40 2800 75 (0.025s, 75%) New 1 OK


SOI etch acceptance test

The SOI etch uses the Low frequency (LF) platen generator to minimize the notching at buried stop layers such as the BOX layer in a SOI wafer.

SOI etch specifications
Parameter Specification Average result
Etch rate (µm/min) > 10 10.7
Etched depth (µm) 100 107
Scallop size (nm) < 800 685
Profile (degs) 91 +/- 1 90.7
Selectivity to AZ photoresist > 100 183
Undercut (µm) <1.5 0.89
Uniformity (%) < 3.5 2.7
Repeatability (%) <4 0.47



SOI etch recipe
Main etch (D->E) Etch Dep
Gas flow (sccm) SF6 400 O2 40 C4F8 250
Cycle time (secs) 3.0 2.0
Pressure (mtorr) 30 25
Coil power (W) 2800 2000
LF Platen power (W) 75 0
LF Platen Pulsing software set-up 0.025s, 75% -
Cycles 96 (process time 08:00)
Common Temperature 20 degs, HBC 10 torr, Long funnel, with baffle & 100 mm spacers