Specific Process Knowledge/Bonding: Difference between revisions
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'''Feedback to this page''': '''[mailto:labadviser@nanolab.dtu.dk?Subject=Feed%20back%20from%20page%20http://labadviser.nanolab.dtu.dk/index.php/Specific_Process_Knowledge/Bonding click here]''' | '''Feedback to this page''': '''[mailto:labadviser@nanolab.dtu.dk?Subject=Feed%20back%20from%20page%20http://labadviser.nanolab.dtu.dk/index.php/Specific_Process_Knowledge/Bonding click here]''' | ||
'''Unless anything else is stated, everything on this page, text and pictures are made by DTU Nanolab.''' | |||
For bonding samples to a carrier wafer in order to enable '''dry etching''', please go [[Specific_Process_Knowledge/Etch/DryEtchProcessing/Bonding|here]]. | For bonding samples to a carrier wafer in order to enable '''dry etching''', please go [[Specific_Process_Knowledge/Etch/DryEtchProcessing/Bonding|here]]. | ||
Latest revision as of 07:18, 6 February 2023
Feedback to this page: click here
Unless anything else is stated, everything on this page, text and pictures are made by DTU Nanolab.
For bonding samples to a carrier wafer in order to enable dry etching, please go here.
For bonding samples to a carrier wafer for UV-lithography using automatic coater and developer, please see this process flow: Process_Flow_ChipOnCarrier.docx, and refer to the bonding procedure for dry etching.
Choose equipment
Choose bonding methods in Wafer Bonder 2
Comparing the three bonding methods in the wafer bonder 2
| Eutectic bonding | Fusion bonding | Anodic bonding | |
|---|---|---|---|
| General description | For bonding two substrates by use of an interphase that makes an eutecticum. | For bonding two identical materials. | For bonding Si and Glass. |
| Bonding temperature | Depending on the eutecticum 310°C to 400°C. | Depending on defects 50°C to 400°C. | Depending on the voltage 300°C to 500°C Standard is 400°C. |
| Annealing temperature | No annealing | 1000°C-1100°C in the anneal bond furnace (C3). | No annealing |
| Materials possible to bond | Bonding of substrates is done by use of the eutectica Au/Si, Au/Sn and Au/Sn/Ni | Si/Si, SiO2/SiO2 | Si/Pyrex (glass) |
| Substrate size | Up to 4" | Up to 4" | Up to 4" |
| Cleaning | Cleaning by N2. | Wet chemical cleaning, IMEC. | Cleaning by N2. |
| Backside alignment | Double side polished wafers. | Double side polished wafers. | Not relevant. |