Specific Process Knowledge/Etch/IBE⁄IBSD Ionfab 300/IBE Si etch - Revision history

Bghe at 09:30, 4 September 2025

2025-09-04T09:30:50Z

← Older revision		Revision as of 11:30, 4 September 2025
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	\|-		\|-
	\|Etch rate in Silicon nitride (low stress)		\|Etch rate in Silicon nitride (low stress)
	\|9.~~1nm~~/min (2013-05-27 BGHE and Matthias F. Carnoy)		\|9.1 nm/min (2013-05-27 BGHE and Matthias F. Carnoy)
	\|-		\|-
	\|Etch rate DUV resist		\|Etch rate DUV resist
	\|13.~~4nm~~/min (2013-05-27 BGHE and Matthias F. Carnoy)		\|13.4 nm/min (2013-05-27 BGHE and Matthias F. Carnoy)
	\|-		\|-
	\|}		\|}
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	[[image:Silicon-IBE-good-b17.jpg\|300x300px\|thumb\|center\|Silicon etch in IBE with good corner definition. Small hare ears are obvious at the structure edge. Substrate etched with Beam current=400mA, Beam voltage=600V, Beam acceleration Voltage=400V, and Stage angle=5°]]		[[image:Silicon-IBE-good-b17.jpg\|300x300px\|thumb\|center\|Silicon etch in IBE with good corner definition. Small hare ears are obvious at the structure edge. Substrate etched with Beam current=400mA, Beam voltage=600V, Beam acceleration Voltage=400V, and Stage angle=5°]]
	!		!
	[[image:Silicon-IBE-bad-b21.jpg\|300x300px\|thumb\|center\|Silicon etch in IBE with rounded corners. Large hare ears with ~~ripling~~ are seen at the structure edge. Substrate etched with Beam current=500mA, Beam voltage=500V, Beam acceleration Voltage=500V, and Stage angle=10°]]		[[image:Silicon-IBE-bad-b21.jpg\|300x300px\|thumb\|center\|Silicon etch in IBE with rounded corners. Large hare ears with rippling's are seen at the structure edge. Substrate etched with Beam current=500mA, Beam voltage=500V, Beam acceleration Voltage=500V, and Stage angle=10°]]
	\|}		\|}

Bghe: /* Results for Si etching in the IBE */

2023-02-06T14:39:17Z

Results for Si etching in the IBE

← Older revision		Revision as of 16:39, 6 February 2023
Line 3:		Line 3:

	=Results for Si etching in the IBE=		=Results for Si etching in the IBE=
	''Made by Kristian Hagsted Rasmussen@Nanotech in 2011'' <br>		''Made by Kristian Hagsted Rasmussen. DTU Nanotech in 2011'' <br>

	The silicon etch test was made as a preliminary test of the IBE system, to obtain a feeling of the system capabilities and the different parameters influence on the etch outcome. A throughout characterization of the wafers was not carried out. However, the most important results are listed here.		The silicon etch test was made as a preliminary test of the IBE system, to obtain a feeling of the system capabilities and the different parameters influence on the etch outcome. A throughout characterization of the wafers was not carried out. However, the most important results are listed here.

Bghe: /* Results for Si etching in the IBE */

2023-02-06T14:39:01Z

Results for Si etching in the IBE

← Older revision		Revision as of 16:39, 6 February 2023
Line 3:		Line 3:

	=Results for Si etching in the IBE=		=Results for Si etching in the IBE=
	''Made by Kristian Hagsted Rasmussen@Nanotech in 2011'' <br\>		''Made by Kristian Hagsted Rasmussen@Nanotech in 2011'' <br>

	The silicon etch test was made as a preliminary test of the IBE system, to obtain a feeling of the system capabilities and the different parameters influence on the etch outcome. A throughout characterization of the wafers was not carried out. However, the most important results are listed here.		The silicon etch test was made as a preliminary test of the IBE system, to obtain a feeling of the system capabilities and the different parameters influence on the etch outcome. A throughout characterization of the wafers was not carried out. However, the most important results are listed here.

Bghe at 07:32, 5 October 2020

2020-10-05T07:32:06Z

← Older revision		Revision as of 09:32, 5 October 2020
Line 1:		Line 1:
	'''Feedback to this page''': '''[mailto:labadviser@~~danchip~~.dtu.dk?Subject=Feed%20back%20from%20page%20http://labadviser.~~danchip~~.dtu.dk/index.php/Specific_Process_Knowledge/Etch/IBE⁄IBSD_Ionfab_300/IBE_Si_etch click here]'''		'''Feedback to this page''': '''[mailto:labadviser@nanolab.dtu.dk?Subject=Feed%20back%20from%20page%20http://labadviser.nanolab.dtu.dk/index.php/Specific_Process_Knowledge/Etch/IBE⁄IBSD_Ionfab_300/IBE_Si_etch click here]'''

Bghe: /* Results for Si etching in the IBE */

2018-08-13T13:25:43Z

Results for Si etching in the IBE

← Older revision		Revision as of 15:25, 13 August 2018
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	''Made by Kristian Hagsted Rasmussen@Nanotech in 2011'' <br\>		''Made by Kristian Hagsted Rasmussen@Nanotech in 2011'' <br\>

	The silicon etch test was made as a preliminary test of the IBE system, to obtain a ~~felling~~ of the system capabilities and the different parameters influence on the etch outcome. A throughout characterization of the wafers was not carried out. However, the most important results are listed here.		The silicon etch test was made as a preliminary test of the IBE system, to obtain a feeling of the system capabilities and the different parameters influence on the etch outcome. A throughout characterization of the wafers was not carried out. However, the most important results are listed here.
	The table list the best etch definition obtained. The IBE etcher should only be used for silicon etching, if you have a specific need that cannot be accommodated in a RIE tool. This could be excessive amount of metals on the surface or a layer of silicon in a stack of several layers that all must be etched.		The table list the best etch definition obtained. The IBE etcher should only be used for silicon etching, if you have a specific need that cannot be accommodated in a RIE tool. This could be excessive amount of metals on the surface or a layer of silicon in a stack of several layers that all must be etched.
	The corner definition is strongly dependent on both accelerator and beam voltage and of course the incident angle. However, no interactions between parameters seem to influence the angle outcome. The good corner definition will introduce hare ears at the resist edge. This is best limited by use of thin resist layers slightly thicker than needed to mask for the duration of the etch. Be aware that the selectivity between silicon and resist is poor.		The corner definition is strongly dependent on both accelerator and beam voltage and of course the incident angle. However, no interactions between parameters seem to influence the angle outcome. The good corner definition will introduce hare ears at the resist edge. This is best limited by use of thin resist layers slightly thicker than needed to mask for the duration of the etch. Be aware that the selectivity between silicon and resist is poor.

Bghe at 13:55, 14 December 2015

2015-12-14T13:55:13Z

← Older revision		Revision as of 15:55, 14 December 2015
Line 3:		Line 3:

	=Results for Si etching in the IBE=		=Results for Si etching in the IBE=
	''Made by Kristian Hagsted Rasmussen @ Nanotech in 2011'' <br\>		''Made by Kristian Hagsted Rasmussen@Nanotech in 2011'' <br\>

	The silicon etch test was made as a preliminary test of the IBE system, to obtain a felling of the system capabilities and the different parameters influence on the etch outcome. A throughout characterization of the wafers was not carried out. However, the most important results are listed here.		The silicon etch test was made as a preliminary test of the IBE system, to obtain a felling of the system capabilities and the different parameters influence on the etch outcome. A throughout characterization of the wafers was not carried out. However, the most important results are listed here.

Bghe at 11:50, 23 September 2013

2013-09-23T11:50:08Z

← Older revision		Revision as of 13:50, 23 September 2013
Line 1:		Line 1:
			'''Feedback to this page''': '''[mailto:labadviser@danchip.dtu.dk?Subject=Feed%20back%20from%20page%20http://labadviser.danchip.dtu.dk/index.php/Specific_Process_Knowledge/Etch/IBE⁄IBSD_Ionfab_300/IBE_Si_etch click here]'''


	=Results for Si etching in the IBE=		=Results for Si etching in the IBE=
	''Made by Kristian Hagsted Rasmussen @ Nanotech in 2011'' <br\>		''Made by Kristian Hagsted Rasmussen @ Nanotech in 2011'' <br\>

Bghe: /* Results for Si etching in the IBE */

2013-05-29T05:38:51Z

Results for Si etching in the IBE

← Older revision		Revision as of 07:38, 29 May 2013
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	\|'''vvv'''		\|'''vvv'''
	\|-		\|-
	\|Etch rate [nm/min]		\|Etch rate in Si [nm/min]
	\|17-18		\|17-18
			\|-
			\|Etch rate in Silicon nitride (low stress)
			\|9.1nm/min (2013-05-27 BGHE and Matthias F. Carnoy)
			\|-
			\|Etch rate DUV resist
			\|13.4nm/min (2013-05-27 BGHE and Matthias F. Carnoy)
			\|-
	\|}		\|}

Khr: /* Some SEM profile images of the etched stacks */

2013-04-10T07:09:48Z

Some SEM profile images of the etched stacks

← Older revision		Revision as of 09:09, 10 April 2013
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	{\| border="1" cellspacing="1" cellpadding="2"		{\| border="1" cellspacing="1" cellpadding="2"
	!		!
	[[image:Silicon-IBE-good-b17.jpg\|300x300px\|thumb\|center\|Silicon etch in IBE with good corner definition. Small hare ears are obvious at the structure edge.]]		[[image:Silicon-IBE-good-b17.jpg\|300x300px\|thumb\|center\|Silicon etch in IBE with good corner definition. Small hare ears are obvious at the structure edge. Substrate etched with Beam current=400mA, Beam voltage=600V, Beam acceleration Voltage=400V, and Stage angle=5°]]
	!		!
	[[image:Silicon-IBE-bad-b21.jpg\|300x300px\|thumb\|center\|Silicon etch in IBE with rounded corners. Large hare ears with ripling are seen at the structure edge.]]		[[image:Silicon-IBE-bad-b21.jpg\|300x300px\|thumb\|center\|Silicon etch in IBE with rounded corners. Large hare ears with ripling are seen at the structure edge. Substrate etched with Beam current=500mA, Beam voltage=500V, Beam acceleration Voltage=500V, and Stage angle=10°]]
	\|}		\|}


	===Contour plots of etch rate and corner angle===		===Contour plots of etch rate and corner angle===

BGE at 13:14, 6 February 2013

2013-02-06T13:14:53Z

← Older revision		Revision as of 15:14, 6 February 2013
Line 54:		Line 54:
	[[image:Silicon-IBE-bad-b21.jpg\|300x300px\|thumb\|center\|Silicon etch in IBE with rounded corners. Large hare ears with ripling are seen at the structure edge.]]		[[image:Silicon-IBE-bad-b21.jpg\|300x300px\|thumb\|center\|Silicon etch in IBE with rounded corners. Large hare ears with ripling are seen at the structure edge.]]
	\|}		\|}


	===Contour plots of etch rate and corner angle===		===Contour plots of etch rate and corner angle===