Specific Process Knowledge/Etch/Etching of Silicon - Revision history

Jmli at 09:41, 21 October 2025

2025-10-21T09:41:57Z

← Older revision		Revision as of 11:41, 21 October 2025
Line 6:		Line 6:
	<!-- Replace "http://labadviser.nanolab.dtu.dk/..." with the link to the Labadviser page-->		<!-- Replace "http://labadviser.nanolab.dtu.dk/..." with the link to the Labadviser page-->
	<!--Page reviewed by jmli 9/8-2022 -->		<!--Page reviewed by jmli 9/8-2022 -->
			<!--Checked for updates on 21/10-2025 - ok/jmli -->

	== Comparing silicon etch methods ==		== Comparing silicon etch methods ==

Rkch at 15:07, 6 February 2023

2023-02-06T15:07:20Z

← Older revision		Revision as of 17:07, 6 February 2023
Line 1:		Line 1:
			'''Unless anything else is stated, everything on this page, text and pictures are made by DTU Nanolab.'''

			'''All links to Kemibrug (SDS) and Labmanager Including APV and QC requires login.'''

	'''Feedback to this page''': '''[mailto:labadviser@nanolab.dtu.dk?Subject=Feed%20back%20from%20page%20http://labadviser.nanolab.dtu.dk/index.php?title=Specific_Process_Knowledge/Etch/Etching_of_Silicon click here]'''		'''Feedback to this page''': '''[mailto:labadviser@nanolab.dtu.dk?Subject=Feed%20back%20from%20page%20http://labadviser.nanolab.dtu.dk/index.php?title=Specific_Process_Knowledge/Etch/Etching_of_Silicon click here]'''
	<!-- Replace "http://labadviser.nanolab.dtu.dk/..." with the link to the Labadviser page-->		<!-- Replace "http://labadviser.nanolab.dtu.dk/..." with the link to the Labadviser page-->

Jmli at 08:59, 9 August 2022

2022-08-09T08:59:55Z

← Older revision		Revision as of 10:59, 9 August 2022
Line 1:		Line 1:
	'''Feedback to this page''': '''[mailto:labadviser@nanolab.dtu.dk?Subject=Feed%20back%20from%20page%20http://labadviser.nanolab.dtu.dk/index.php?title=Specific_Process_Knowledge/Etch/Etching_of_Silicon click here]'''		'''Feedback to this page''': '''[mailto:labadviser@nanolab.dtu.dk?Subject=Feed%20back%20from%20page%20http://labadviser.nanolab.dtu.dk/index.php?title=Specific_Process_Knowledge/Etch/Etching_of_Silicon click here]'''
	<!-- Replace "http://labadviser.nanolab.dtu.dk/..." with the link to the Labadviser page-->		<!-- Replace "http://labadviser.nanolab.dtu.dk/..." with the link to the Labadviser page-->
			<!--Page reviewed by jmli 9/8-2022 -->

	== Comparing silicon etch methods ==		== Comparing silicon etch methods ==

Jmli at 12:11, 25 November 2019

2019-11-25T12:11:46Z

← Older revision		Revision as of 14:11, 25 November 2019
Line 1:		Line 1:
	'''Feedback to this page''': '''[mailto:labadviser@~~danchip~~.dtu.dk?Subject=Feed%20back%20from%20page%20http://labadviser.~~danchip~~.dtu.dk/index.php?title=Specific_Process_Knowledge/Etch/Etching_of_Silicon click here]'''		'''Feedback to this page''': '''[mailto:labadviser@nanolab.dtu.dk?Subject=Feed%20back%20from%20page%20http://labadviser.nanolab.dtu.dk/index.php?title=Specific_Process_Knowledge/Etch/Etching_of_Silicon click here]'''
	<!-- Replace "http://labadviser.~~danchip~~.dtu.dk/..." with the link to the Labadviser page-->		<!-- Replace "http://labadviser.nanolab.dtu.dk/..." with the link to the Labadviser page-->

	== Comparing silicon etch methods ~~at Danchip~~ ==		== Comparing silicon etch methods ==

	There are a broad ~~varity~~ of silicon etch ~~methodes~~ at ~~Danchip.~~ The ~~methodes~~ are compared here to make it easier for you to compare and choose the one that suits your needs.		There are a broad variety of silicon etch methods at DTU Nanolab The methods are compared here to make it easier for you to compare and choose the one that suits your needs.

	===Wet etches:===		===Wet etches:===

Bghe: /* Compare the methods for Si etching */

2018-05-07T13:51:38Z

Compare the methods for Si etching

← Older revision		Revision as of 15:51, 7 May 2018
Line 25:		Line 25:
	![[Specific Process Knowledge/Etch/KOH Etch\|Si Etch]]		![[Specific Process Knowledge/Etch/KOH Etch\|Si Etch]]
	![[Specific Process Knowledge/Etch/Wet Polysilicon Etch\|Wet PolySilicon etch]]		![[Specific Process Knowledge/Etch/Wet Polysilicon Etch\|Wet PolySilicon etch]]
	~~![[Specific Process Knowledge/Etch/RIE (Reactive Ion Etch)\|RIE (Reactive Ion Etch)]]~~
	![[Specific Process Knowledge/Etch/DRIE-Pegasus\|DRIE-Pegasus (Deep Reactive Ion Etch)]]		![[Specific Process Knowledge/Etch/DRIE-Pegasus\|DRIE-Pegasus (Deep Reactive Ion Etch)]]
	![[Specific Process Knowledge/Etch/ASE (Advanced Silicon Etch)\|ASE (Advanced Silicon Etch)]]		![[Specific Process Knowledge/Etch/ASE (Advanced Silicon Etch)\|ASE (Advanced Silicon Etch)]]
Line 41:		Line 40:
	\|		\|
	*Isotropic etch in crystalline silicon and polysilicon		*Isotropic etch in crystalline silicon and polysilicon
	\|
	*Can etch isotropic and anisotropic depending on the process parameters and mask design.
	\|		\|
	*State-of-the-art dry silicon etcher with atmospheric cassette loader		*State-of-the-art dry silicon etcher with atmospheric cassette loader
Line 48:		Line 45:
	*Extremely high etch rate and advanced processing options		*Extremely high etch rate and advanced processing options
	\|		\|
	*~~As RIE but better for high aspect ratio etching~~ and ~~deep etches (higher etch rate)~~		*Can etch isotropic and anisotropic depending on the process parameters and mask design
	*Good selectivity to photoresist		*Good selectivity to photoresist
	*The ASE ~~is dedicated to polymer etch~~, which can affect the Si etch stability.		*The ASE open for same metal on the samples and SiO2 etching, which can affect the Si etch stability.
	\|		\|
	*This is dedicated to metal etch. So fare only Si etch of nanostructures has been explored on the system.		*This is dedicated to metal etch. So fare only Si etch of nanostructures has been explored on the system.
Line 63:		Line 60:
	*Silicon Nitride		*Silicon Nitride
	*Silicon Oxide		*Silicon Oxide
	\|
	*Silicon Nitride
	*Silicon Oxide
	*Photoresist
	\|		\|
	*Photo-, DUV- and e-beamresist		*Photo-, DUV- and e-beamresist
Line 105:		Line 98:
	\|		\|
	*~100-200 nm/min, highly dependent on doping level		*~100-200 nm/min, highly dependent on doping level
	\|
	*<40nm/min to >600nm/min depending on recipe parameters and mask design
	\|		\|
	*Up to 18-20 µm/min depending on recipe, mask design and aspect ratio.		*Up to 18-20 µm/min depending on recipe, mask design and aspect ratio.
Line 134:		Line 125:
	*<nowiki>#</nowiki>1 100 mm wafer		*<nowiki>#</nowiki>1 100 mm wafer
	*<nowiki>#</nowiki>1 150 mm wafers (only when the system is set up to 150mm)		*<nowiki>#</nowiki>1 150 mm wafers (only when the system is set up to 150mm)
	\|
	*As many small samples as can be fitted on a 100mm wafer
	*<nowiki>#</nowiki>1 50 mm wafer fitted on a 100mm wafer
	*<nowiki>#</nowiki>1 100 mm wafer
	*<nowiki>#</nowiki>1 150 mm wafers (only RIE2 when set up for 150mm)
	\|		\|
	*As many small samples as can be fitted on a 150mm wafer		*As many small samples as can be fitted on a 150mm wafer
Line 165:		Line 151:
	*Silicon Oxynitride		*Silicon Oxynitride
	*Photoresist		*Photoresist
	\|
	*Silicon
	*Silicon Oxide
	*Silicon Nitride
	*Silicon Oxynitride
	*Photo-, DUV- and e-beamresist
	*Other metals if they cover less than 5% of the wafer area (ONLY RIE2!)
	*Quartz/fused silica
	\|		\|
	*Silicon		*Silicon
Line 189:		Line 167:
	*Aluminium		*Aluminium
	*Quartz/fused silica		*Quartz/fused silica
			*Other metals if they cover less than 5% of the wafer area
	\|		\|
	*Silicon		*Silicon

Bghe: /* Dry etches: */

2018-05-07T13:43:24Z

Dry etches:

← Older revision		Revision as of 15:43, 7 May 2018
Line 11:		Line 11:

	===Dry etches:===		===Dry etches:===
	*[[/Si etch using RIE1 or RIE2\|Si etch using RIE2]]
	*[[/Si etch using ASE\|Si etch using ASE (Advanced Silicon Etch)]]		*[[/Si etch using ASE\|Si etch using ASE (Advanced Silicon Etch)]]
	*[[Specific Process Knowledge/Etch/DRIE-Pegasus\|Si etch using DRIE-Pegasus (Silicon Etch)]]		*[[Specific Process Knowledge/Etch/DRIE-Pegasus\|Si etch using DRIE-Pegasus (Silicon Etch)]]

Bghe: /* Wet etches: */

2018-03-13T14:11:47Z

Wet etches:

← Older revision		Revision as of 16:11, 13 March 2018
Line 7:		Line 7:

	===Wet etches:===		===Wet etches:===
	*[[Specific Process Knowledge/Etch/KOH Etch\|Si Etch]]		*[[Specific Process Knowledge/Etch/KOH Etch\|Si Etch: KOH]]
	*[[Specific Process Knowledge/Etch/Wet Polysilicon Etch\|Wet PolySilicon etch]]		*[[Specific Process Knowledge/Etch/Wet Polysilicon Etch\|Wet PolySilicon etch]]

Mbec: /* Compare the methods for Si etching */

2017-03-01T13:45:07Z

Compare the methods for Si etching

← Older revision		Revision as of 15:45, 1 March 2017
Line 125:		Line 125:
	*<nowiki>#</nowiki>25 wafers of 100mm or 150nm and smaller samples in Si Etch 3 (fume hood)		*<nowiki>#</nowiki>25 wafers of 100mm or 150nm and smaller samples in Si Etch 3 (fume hood)
	\|		\|
	*<nowiki>#</nowiki>25 ~~100~~ mm wafers ~~in our 100mm bath~~		*<nowiki>#</nowiki>#25 wafers of 100mm or 150nm mm wafers
	\|		\|
	*As many small samples as can be fitted on the 100mm carrier.		*As many small samples as can be fitted on the 100mm carrier.

Mbec: /* Wet etches: */

2017-03-01T13:42:31Z

Wet etches:

← Older revision		Revision as of 15:42, 1 March 2017
Line 7:		Line 7:

	===Wet etches:===		===Wet etches:===
	*[[Specific Process Knowledge/Etch/Si Etch\|Si Etch]]		*[[Specific Process Knowledge/Etch/KOH Etch\|Si Etch]]
	*[[Specific Process Knowledge/Etch/Wet Polysilicon Etch\|Wet PolySilicon etch]]		*[[Specific Process Knowledge/Etch/Wet Polysilicon Etch\|Wet PolySilicon etch]]

Mbec: /* Compare the methods for Si etching */

2017-03-01T13:42:12Z

Compare the methods for Si etching

← Older revision		Revision as of 15:42, 1 March 2017
Line 24:		Line 24:
	\|-style="background:silver; color:black"		\|-style="background:silver; color:black"
	!		!
	![[Specific Process Knowledge/Etch/Si Etch\|Si Etch]]		![[Specific Process Knowledge/Etch/KOH Etch\|Si Etch]]
	![[Specific Process Knowledge/Etch/Wet Polysilicon Etch\|Wet PolySilicon etch]]		![[Specific Process Knowledge/Etch/Wet Polysilicon Etch\|Wet PolySilicon etch]]
	![[Specific Process Knowledge/Etch/RIE (Reactive Ion Etch)\|RIE (Reactive Ion Etch)]]		![[Specific Process Knowledge/Etch/RIE (Reactive Ion Etch)\|RIE (Reactive Ion Etch)]]