Specific Process Knowledge/Etch/DRIE-Pegasus/processA/PrA-1 - Revision history

Jmli at 12:37, 5 February 2026

2026-02-05T12:37:49Z

← Older revision		Revision as of 14:37, 5 February 2026
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Jmli at 10:32, 28 June 2023

2023-06-28T10:32:09Z

← Older revision		Revision as of 12:32, 28 June 2023
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Jmli at 06:43, 5 October 2020

2020-10-05T06:43:55Z

← Older revision		Revision as of 08:43, 5 October 2020
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			'''Feedback to this page''':
			'''[mailto:labadviser@nanolab.dtu.dk?Subject=Feed%20back%20from%20page%20http://labadviser.nanolab.dtu.dk/index.php/Specific_Process_Knowledge/Etch/DRIE-Pegasus/processA/PrA-1 click here]'''

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Jmli at 11:54, 30 July 2018

2018-07-30T11:54:06Z

← Older revision		Revision as of 13:54, 30 July 2018
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Jmli at 10:44, 22 June 2016

2016-06-22T10:44:50Z

← Older revision		Revision as of 12:44, 22 June 2016
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	! colspan="2" width="120"\| Substrate Information		! colspan="2" width="120"\| Substrate Information
	! colspan="3" \| Process Information		! colspan="3" \| Process Information
	! rowspan="2~~" width="500~~" \|SEM Images		! rowspan="2" \|SEM Images
	\|-		\|-
	! width="30" \| Wafer info		! width="30" \| Wafer info

Jmli at 10:36, 16 June 2016

2016-06-16T10:36:23Z

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Jmli: Created page with " {| border="2" cellpadding="0" cellspacing="0" style="text-align:center;" |+ '''Process runs''' |- ! rowspan="2" width="40"| Date ! colspan="2" width="120"| Substrate Informa..."

2016-06-15T13:47:33Z

Created page with " {| border="2" cellpadding="0" cellspacing="0" style="text-align:center;" |+ '''Process runs''' |- ! rowspan="2" width="40"| Date ! colspan="2" width="120"| Substrate Informa..."

New page

{| border="2" cellpadding="0" cellspacing="0" style="text-align:center;"
|+ '''Process runs'''
|-
! rowspan="2" width="40"| Date
! colspan="2" width="120"| Substrate Information
! colspan="3" | Process Information
! rowspan="2" width="500" |SEM Images
|-
! width="30" | Wafer info
! width="40" | Exposed area
! width="40" | Conditioning
! width="40" | Recipe
! width="40" | Wafer ID
|-
| 2/5-2016
| 4" Travka20 Wafer
| 20 % Si
| 3 minute TDESC clean
| PrA-1, 80 cycles or 14:40 minutes
| C03991.02
|
[[file:C03991.02 086.jpg|150px|frameless ]]
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|-
| 2/5-2016
| 4" Travka20 Wafer
| 20 % Si
| 3 minute TDESC clean
| PrA-1, 80 cycles or 14:40 minutes
| C03991.05
|
[[file:C03991.05 144.jpg|150px|frameless ]]
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|-
| 3/6-2016
| 4" Travka20 Wafer
| 20 % Si
| 3 minute TDESC clean
| PrA-1, 80 cycles or 14:40 minutes
| C04047.02
|
[[file:C04047.02 086.jpg|150px|frameless ]]
[[file:C04047.02 087.jpg|150px|frameless ]]
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|-
| 3/6-2016
| 4" Travka20 Wafer
| 20 % Si
| 3 minute TDESC clean
| PrA-1, 80 cycles or 14:40 minutes
| C04047.05
|
[[file:C04047.05 132.jpg|150px|frameless ]]
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|-
|}