Specific Process Knowledge/Etch/AOE (Advanced Oxide Etch) - Revision history

Bghe: /* An overview of the performance of AOE and some process related parameters */

2026-06-16T13:38:58Z

An overview of the performance of AOE and some process related parameters

← Older revision		Revision as of 15:38, 16 June 2026
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	'''Feedback to this page''': '''[mailto:labadviser@nanolab.dtu.dk?Subject=Feed%20back%20from%20page%20http://labadviser.nanolab.dtu.dk/index.php/Specific_Process_Knowledge/Etch/AOE_(Advanced_Oxide_Etch) click here]'''		'''Feedback to this page''': '''[mailto:labadviser@nanolab.dtu.dk?Subject=Feed%20back%20from%20page%20http://labadviser.nanolab.dtu.dk/index.php/Specific_Process_Knowledge/Etch/AOE_(Advanced_Oxide_Etch) click here]'''
	[[Category: Equipment\|Etch AOE]]		[[index.php?title=Category:Equipment\|Etch AOE]]
	[[Category: Etch (Dry) Equipment\|AOE]]		[[index.php?title=Category:Etch (Dry) Equipment\|AOE]]


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	*H<sub>2</sub>: 0-30 sccm		*H<sub>2</sub>: 0-30 sccm
	*He: 0-500 sccm		*He: 0-500 sccm
	*N<sub>2</sub>: 0-1000 sccm
	*SF<sub>6</sub>: 0-300 sccm		*SF<sub>6</sub>: 0-300 sccm
	\|-		\|-

Mmat at 14:22, 16 June 2025

2025-06-16T14:22:29Z

← Older revision		Revision as of 16:22, 16 June 2025
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			{{cc-nanolab}}

	'''Feedback to this page''': '''[mailto:labadviser@nanolab.dtu.dk?Subject=Feed%20back%20from%20page%20http://labadviser.nanolab.dtu.dk/index.php/Specific_Process_Knowledge/Etch/AOE_(Advanced_Oxide_Etch) click here]'''		'''Feedback to this page''': '''[mailto:labadviser@nanolab.dtu.dk?Subject=Feed%20back%20from%20page%20http://labadviser.nanolab.dtu.dk/index.php/Specific_Process_Knowledge/Etch/AOE_(Advanced_Oxide_Etch) click here]'''
	[[Category: Equipment\|Etch AOE]]		[[Category: Equipment\|Etch AOE]]
	[[Category: Etch (Dry) Equipment\|AOE]]		[[Category: Etch (Dry) Equipment\|AOE]]

	~~{{CC1}}~~

	== Etching using the dry etch technique AOE (Advanced oxide etch) ==		== Etching using the dry etch technique AOE (Advanced oxide etch) ==

Bghe at 09:38, 3 February 2023

2023-02-03T09:38:47Z

← Older revision		Revision as of 11:38, 3 February 2023
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	== Etching using the dry etch technique AOE (Advanced oxide etch) ==		== Etching using the dry etch technique AOE (Advanced oxide etch) ==
	[[Image:AOE.jpg\|300x300px\|thumb\|AOE: positioned in cleanroom B-1, ~~photo: DTU Nanolab internal~~]]		[[Image:AOE.jpg\|300x300px\|thumb\|AOE: positioned in cleanroom B-1, {{photo1}}]]

	Name: M/PLEX ICP - AOE (Advanced Oxide Etcher) <br>		Name: M/PLEX ICP - AOE (Advanced Oxide Etcher) <br>

Bghe at 15:35, 1 February 2023

2023-02-01T15:35:33Z

← Older revision		Revision as of 17:35, 1 February 2023
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	[[Category: Etch (Dry) Equipment\|AOE]]		[[Category: Etch (Dry) Equipment\|AOE]]

	~~''This page is written by DTU Nanolab internals if nothing else is stated'' <br>~~		{{CC1}}

	== Etching using the dry etch technique AOE (Advanced oxide etch) ==		== Etching using the dry etch technique AOE (Advanced oxide etch) ==

Bghe: /* Transparent wafers */

2023-01-31T13:12:37Z

Transparent wafers

← Older revision		Revision as of 15:12, 31 January 2023
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	====Transparent wafers====		====Transparent wafers====
	Transparent wafers are a ~~challange~~ for two reasons. 1. In the load lock the LASER detection system that is used to detect the wafer during mapping cannot detect a completely transparent wafer. 2. A transparent wafer is either quartz or fused silicon. These materials are very difficult to clamp electrostatically and will therefore not be able to pass the He leak up test ~~succesfully~~.		Transparent wafers are a challenge for two reasons. 1. In the load lock the LASER detection system that is used to detect the wafer during mapping cannot detect a completely transparent wafer. 2. A transparent wafer is either quartz or fused silicon. These materials are very difficult to clamp electrostatically and will therefore not be able to pass the He leak up test successfully.
	# The first issue may be overcome by using a non-transparent masking material or adding a non-transparent material on the back side of the wafer ~~(could be aluminium).~~		# The first issue may be overcome by using a non-transparent masking material or adding a non-transparent material on the back side of the wafer
	#The second issue may be overcome by reducing the He back side pressure or reducing the He back side cooling completely. Another way to solve it is to either bond the transparent wafer to a silicon wafer before ~~transfering~~ it into chamber or ~~deposite~~ a more conducting layer on the backside of the wafer~~. This~~ could be ~~aluminium but also~~ 1-2µm P-Si may be enough.		#The second issue may be overcome by reducing the He back side pressure or reducing the He back side cooling completely. Another way to solve it is to either bond the transparent wafer to a silicon wafer before transferring it into chamber or deposit a more conducting/semiconducting layer on the backside of the wafer (could be silicon, maybe Chromium, please ask). 1-2µm P-Si may be enough, maybe even less.

	==An overview of the performance of AOE and some process related parameters==		==An overview of the performance of AOE and some process related parameters==

Bghe: /* Etching using the dry etch technique AOE (Advanced oxide etch) */

2023-01-31T13:08:55Z

Etching using the dry etch technique AOE (Advanced oxide etch)

← Older revision		Revision as of 15:08, 31 January 2023
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	== Etching using the dry etch technique AOE (Advanced oxide etch) ==		== Etching using the dry etch technique AOE (Advanced oxide etch) ==
	[[Image:AOE.jpg\|300x300px\|thumb\|AOE: positioned in cleanroom B-1]]		[[Image:AOE.jpg\|300x300px\|thumb\|AOE: positioned in cleanroom B-1, photo: DTU Nanolab internal]]

	Name: M/PLEX ICP - AOE (Advanced Oxide Etcher) <br>		Name: M/PLEX ICP - AOE (Advanced Oxide Etcher) <br>
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	<!-- give the link to the equipment info page in LabManager: -->		<!-- give the link to the equipment info page in LabManager: -->
	[http://labmanager.danchip.dtu.dk/function.php?module=Machine&view=view&mach=115 AOE in LabManager~~, photo: DTU Nanolab internal~~]		[http://labmanager.danchip.dtu.dk/function.php?module=Machine&view=view&mach=115 AOE in LabManager - requires login]

	== Process information ==		== Process information ==

Bghe: /* Etching using the dry etch technique AOE (Advanced oxide etch) */

2023-01-31T13:08:16Z

Etching using the dry etch technique AOE (Advanced oxide etch)

← Older revision		Revision as of 15:08, 31 January 2023
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	<!-- give the link to the equipment info page in LabManager: -->		<!-- give the link to the equipment info page in LabManager: -->
	[http://labmanager.danchip.dtu.dk/function.php?module=Machine&view=view&mach=115 AOE in LabManager]		[http://labmanager.danchip.dtu.dk/function.php?module=Machine&view=view&mach=115 AOE in LabManager, photo: DTU Nanolab internal]

	== Process information ==		== Process information ==

Bghe at 13:07, 31 January 2023

2023-01-31T13:07:47Z

← Older revision		Revision as of 15:07, 31 January 2023
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	[[Category: Equipment\|Etch AOE]]		[[Category: Equipment\|Etch AOE]]
	[[Category: Etch (Dry) Equipment\|AOE]]		[[Category: Etch (Dry) Equipment\|AOE]]

			''This page is written by DTU Nanolab internals if nothing else is stated'' <br>

	== Etching using the dry etch technique AOE (Advanced oxide etch) ==		== Etching using the dry etch technique AOE (Advanced oxide etch) ==

Bghe at 11:02, 6 September 2022

2022-09-06T11:02:01Z

← Older revision		Revision as of 13:02, 6 September 2022
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	Name: M/PLEX ICP - AOE (Advanced Oxide Etcher) <br>		Name: M/PLEX ICP - AOE (Advanced Oxide Etcher) <br>
	Vendor: STS (now SPTS) <br>		Vendor: STS (now SPTS) <br>
	The AOE can be used for dry etching silicon oxide, silicon (oxy)nitride and quartz. Look in the manuals for the AOE to see how to operate the machine (you can find the manuals in LabManager on the AOE page).		The AOE can be used for dry etching silicon oxide, silicon (oxy) nitride and quartz. Look in the manuals for the AOE to see how to operate the machine (you can find the manuals in LabManager on the AOE page).

Jmli: /* A rough overview of the performance of AOE and some process related parameters */

2019-11-25T10:38:12Z

A rough overview of the performance of AOE and some process related parameters

← Older revision		Revision as of 12:38, 25 November 2019
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	#The second issue may be overcome by reducing the He back side pressure or reducing the He back side cooling completely. Another way to solve it is to either bond the transparent wafer to a silicon wafer before transfering it into chamber or deposite a more conducting layer on the backside of the wafer. This could be aluminium but also 1-2µm P-Si may be enough.		#The second issue may be overcome by reducing the He back side pressure or reducing the He back side cooling completely. Another way to solve it is to either bond the transparent wafer to a silicon wafer before transfering it into chamber or deposite a more conducting layer on the backside of the wafer. This could be aluminium but also 1-2µm P-Si may be enough.

	==~~A rough~~ overview of the performance of AOE and some process related parameters==		==An overview of the performance of AOE and some process related parameters==

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