LabAdviser/Technology Research/Smoothed advanced silicon NEMS devices - Revision history

Mmat: /* Publications */

2025-05-27T16:09:12Z

Publications

@@ Line 9: / Line 9: @@
 Plasma processes are important for silicon-based micro electromechanical systems (MEMS) with critical dimensions around a few microns. Although widely utilized and largely understood, silicon plasma etching fails to reproduce at the nanoscale. Transport effects ‘down the etched cavity’ limit rate and selectivity while high aspect ratios, profile and passivation control are more challenging. The so-called Bosch etch process is probably the most popular technique in MEMS production facilities today. However, the high roughness with finite sidewall scallop size and hard to remove fluorocarbon (FC) residue on the sidewalls of etched structures make the process less favorable for nanoscale engineering.
 In this project, the usability of SF6 and O2 plasma will be studied as a replacement for Bosch process to avoid FC residue and facilitate the nanoscale silicon etching with profile control and sufficient mask selectivity preferably at room temperature. The focus will be on the development of a fundamental understanding of the special challenges in SF6-O2 plasma etching at the nanoscale including the physics and chemistry involved. The aim is to establish a generic knowledge platform for future applications such as injection molding.
 For this, modern lithography tools (MLA, DUV stepper, e-beam) will be utilized to define the structure down to 10nm critical dimension on top of a silicon wafer. Subsequently, the pattern will be transferred into the silicon layer using a modern plasma tool (SPTS, DRIE-Pegasus). During the process, various etching parameters (flow, pressure, power, etc.) are varied to discover performance-affecting factors. Finally, etching results are characterized under scanning electron microscopy (Carl Zeiss AG, SEM Supra 60VP).

Mmat at 14:49, 21 May 2025

2025-05-21T14:49:53Z

← Older revision		Revision as of 16:49, 21 May 2025
Line 3:		Line 3:
	*'''Project responsible:''' Vy Thi Hoang Nguyen		*'''Project responsible:''' Vy Thi Hoang Nguyen
	*'''Supervisors:'''Henri Jansen, Flemming Jensen, Jörg Hübner		*'''Supervisors:'''Henri Jansen, Flemming Jensen, Jörg Hübner
	*'''Partners involved:''' DTU Danchip		*'''Partners involved:''' DTU Nanolab (former DTU Danchip)
	*'''Project start:''' November 2017		*'''Project start:''' November 2017

Vthongu: /* Technology Development of Silicon Plasma Etching Process at Nanoscale */

2020-05-09T12:51:47Z

Technology Development of Silicon Plasma Etching Process at Nanoscale

← Older revision		Revision as of 14:51, 9 May 2020
Line 1:		Line 1:
	=~~Smoothed advanced silicon NEMS devices~~=		=Technology Development of Silicon Plasma Etching Process at Nanoscale=
	*'''Project type:''' Ph.d. project		*'''Project type:''' Ph.d. project
	*'''Project responsible:''' Vy Thi Hoang Nguyen		*'''Project responsible:''' Vy Thi Hoang Nguyen
Line 7:		Line 7:

	==Project Description==		==Project Description==
	Plasma processes are important for micro ~~electro-mechanical~~ systems (MEMS) with critical dimensions of a few microns. The so-called Bosch etch process is probably the most popular technique in MEMS production facilities today. It uses a repeating sequence of plasma enhanced deposition to passivate silicon features, a physical etch for directional removal of this layer at the base of the features, and an isotropic etch for silicon removal at the cleared surfaces. However, ~~it is not well suited to~~ the ~~nanoscale due to~~ finite sidewall scallop size and ~~undercut unless rate and selectivity are severely compromised.~~		Plasma processes are important for silicon-based micro electromechanical systems (MEMS) with critical dimensions around a few microns. Although widely utilized and largely understood, silicon plasma etching fails to reproduce at the nanoscale. Transport effects ‘down the etched cavity’ limit rate and selectivity while high aspect ratios, profile and passivation control are more challenging. The so-called Bosch etch process is probably the most popular technique in MEMS production facilities today. However, the high roughness with finite sidewall scallop size and hard to remove fluorocarbon (FC) residue on the sidewalls of etched structures make the process less favorable for nanoscale engineering.
			In this project, the usability of SF6 and O2 plasma will be studied as a replacement for Bosch process to avoid FC residue and facilitate the nanoscale silicon etching with profile control and sufficient mask selectivity preferably at room temperature. The focus will be on the development of a fundamental understanding of the special challenges in SF6-O2 plasma etching at the nanoscale including the physics and chemistry involved. The aim is to establish a generic knowledge platform for future applications such as injection molding.
	~~Anisotropic wet etching such as potassium hydroxide~~ (~~KOH~~) ~~and tetramethylammonium hydroxide (TMAH) can form smooth~~ sidewalls~~, but~~ the ~~geometry is limited by crystal planes~~. ~~Another solution is to develop post-dry etching processes to remove~~ the ~~sidewall scallops. Sacrificial thermal oxidation has been utilized~~ to ~~improve sidewall quality. However,~~ the ~~process consumes too much~~ silicon and ~~builds up residual stress~~. ~~By employing hydrogen annealing, it was reported that sidewall scallops can~~ be ~~dramatically reduced. The surface mobility of silicon atoms is enhanced by heated hydrogen at temperatures much lower than the melting point (1414<sup>o</sup>C). Based~~ on ~~this phenomenon, migrating atoms smooth out~~ the ~~surface roughness to minimize~~ the ~~total surface energy without losing volume.~~		For this, modern lithography tools (MLA, DUV stepper, e-beam) will be utilized to define the structure down to 10nm critical dimension on top of a silicon wafer. Subsequently, the pattern will be transferred into the silicon layer using a modern plasma tool (SPTS, DRIE-Pegasus). During the process, various etching parameters (flow, pressure, power, etc.) are varied to discover performance-affecting factors. Finally, etching results are characterized under scanning electron microscopy (Carl Zeiss AG, SEM Supra 60VP).

	~~Hydrogen~~-~~induced surface migration not only changes~~ the ~~surface morphology but also affects~~ the ~~global profile if the surface migration length~~ is ~~comparable~~ to ~~or larger than structural dimensions~~. ~~This effect is similar to the reflow process in glasses or polymers~~, ~~but unlike the reflow process~~, ~~this mechanism only depends on surface~~-~~atom movement and~~ the ~~crystalline~~ structure ~~is preserved. Thermal annealing in hydrogen ambient has also been reported~~ to ~~produce round corners and various voids in bulk~~ silicon.

	This project aims to facilitate a reliable creation of smooth and slender nanostructures to demonstrate the ability in some state-of-the-art and novel NEMS applications include 1) resonators and sensors for physical and bio-chemical sensing down to the molecular level both because of the much reduced mass, ~~2) nanowires for novel transistors and photovoltaics increasingly exploring quantum effects starting at~~ the ~~sub-50nm level, 3) nanostructures for photonics (around~~ the ~~wavelength of the guided photons) and next generation storage (10nm and below), 4) black~~ silicon for high area catalyzed reaction chambers and photovoltaics, 5) through wafer vias for packaging applications, and 6) nano imprint lithography (NIL) masters. The approach is to first create nanoscale silicon patterns using ~~the~~ modern ~~high density~~ plasma tool (SPTS DRIE-Pegasus). ~~This structure is then annealed in pure hydrogen at high temperature~~ (~~1100<sup>o</sup>C~~) ~~and high vacuum (10E-6 mbar) using an annealling tool (Annealsys RTP~~-~~150-HV)~~. ~~The quantitative analysis on the sidewall roughness reduction will be measured using~~ scanning electron ~~microscopes~~ (SEM~~) and atomic force microscope (AFM~~).

	==Publications==		==Publications==

Bghe at 09:49, 6 May 2020

2020-05-06T09:49:00Z

← Older revision		Revision as of 11:49, 6 May 2020
Line 4:		Line 4:
	*'''Supervisors:'''Henri Jansen, Flemming Jensen, Jörg Hübner		*'''Supervisors:'''Henri Jansen, Flemming Jensen, Jörg Hübner
	*'''Partners involved:''' DTU Danchip		*'''Partners involved:''' DTU Danchip
	*'''Project start: November 2017		*'''Project start:''' November 2017

	==Project Description==		==Project Description==

Bghe: /* Smoothed advanced silicon NEMS devices */

2020-05-06T09:48:49Z

Smoothed advanced silicon NEMS devices

← Older revision		Revision as of 11:48, 6 May 2020
Line 4:		Line 4:
	*'''Supervisors:'''Henri Jansen, Flemming Jensen, Jörg Hübner		*'''Supervisors:'''Henri Jansen, Flemming Jensen, Jörg Hübner
	*'''Partners involved:''' DTU Danchip		*'''Partners involved:''' DTU Danchip
			*'''Project start: November 2017

	==Project Description==		==Project Description==

Bghe at 08:08, 6 May 2020

2020-05-06T08:08:10Z

← Older revision		Revision as of 10:08, 6 May 2020
Line 13:		Line 13:

	This project aims to facilitate a reliable creation of smooth and slender nanostructures to demonstrate the ability in some state-of-the-art and novel NEMS applications include 1) resonators and sensors for physical and bio-chemical sensing down to the molecular level both because of the much reduced mass, 2) nanowires for novel transistors and photovoltaics increasingly exploring quantum effects starting at the sub-50nm level, 3) nanostructures for photonics (around the wavelength of the guided photons) and next generation storage (10nm and below), 4) black silicon for high area catalyzed reaction chambers and photovoltaics, 5) through wafer vias for packaging applications, and 6) nano imprint lithography (NIL) masters. The approach is to first create nanoscale silicon patterns using the modern high density plasma tool (SPTS DRIE-Pegasus). This structure is then annealed in pure hydrogen at high temperature (1100<sup>o</sup>C) and high vacuum (10E-6 mbar) using an annealling tool (Annealsys RTP-150-HV). The quantitative analysis on the sidewall roughness reduction will be measured using scanning electron microscopes (SEM) and atomic force microscope (AFM).		This project aims to facilitate a reliable creation of smooth and slender nanostructures to demonstrate the ability in some state-of-the-art and novel NEMS applications include 1) resonators and sensors for physical and bio-chemical sensing down to the molecular level both because of the much reduced mass, 2) nanowires for novel transistors and photovoltaics increasingly exploring quantum effects starting at the sub-50nm level, 3) nanostructures for photonics (around the wavelength of the guided photons) and next generation storage (10nm and below), 4) black silicon for high area catalyzed reaction chambers and photovoltaics, 5) through wafer vias for packaging applications, and 6) nano imprint lithography (NIL) masters. The approach is to first create nanoscale silicon patterns using the modern high density plasma tool (SPTS DRIE-Pegasus). This structure is then annealed in pure hydrogen at high temperature (1100<sup>o</sup>C) and high vacuum (10E-6 mbar) using an annealling tool (Annealsys RTP-150-HV). The quantitative analysis on the sidewall roughness reduction will be measured using scanning electron microscopes (SEM) and atomic force microscope (AFM).

			==Publications==
			===Name of publication 1 made in this project===
			Reference and link to the publication

			*[[/Process flow form\|Process flow(s) relevant to this publication including links to Process development made in connection to this publication this is describes in either LabAdviser or Process2Share]]

			===Name of publication2 made in this project===
			Reference and link to the publication

			*[[/Process flow form\|Process flow(s) relevant to this publication including links to Process development made in connection to this publication this is describes in either LabAdviser or Process2Share]]

			===Name of publication3 made in this project===
			Reference and link to the publication

			*[[/Process flow form\|Process flow(s) relevant to this publication including links to Process development made in connection to this publication this is describes in either LabAdviser or Process2Share]]

Vthongu: /* Project Description */

2019-02-27T13:34:23Z

Project Description

← Older revision		Revision as of 15:34, 27 February 2019
Line 8:		Line 8:
	Plasma processes are important for micro electro-mechanical systems (MEMS) with critical dimensions of a few microns. The so-called Bosch etch process is probably the most popular technique in MEMS production facilities today. It uses a repeating sequence of plasma enhanced deposition to passivate silicon features, a physical etch for directional removal of this layer at the base of the features, and an isotropic etch for silicon removal at the cleared surfaces. However, it is not well suited to the nanoscale due to finite sidewall scallop size and undercut unless rate and selectivity are severely compromised.		Plasma processes are important for micro electro-mechanical systems (MEMS) with critical dimensions of a few microns. The so-called Bosch etch process is probably the most popular technique in MEMS production facilities today. It uses a repeating sequence of plasma enhanced deposition to passivate silicon features, a physical etch for directional removal of this layer at the base of the features, and an isotropic etch for silicon removal at the cleared surfaces. However, it is not well suited to the nanoscale due to finite sidewall scallop size and undercut unless rate and selectivity are severely compromised.

	Anisotropic wet etching such as potassium hydroxide (KOH) and tetramethylammonium hydroxide (TMAH) can form smooth sidewalls, but the geometry is limited by crystal planes. Another solution is to develop post-dry etching processes to remove the sidewall scallops. Sacrificial thermal oxidation has been utilized to improve sidewall quality. However, the process consumes too much silicon and builds up residual stress. By employing hydrogen annealing, it was reported that sidewall scallops can be dramatically reduced. The surface mobility of silicon atoms is enhanced by heated hydrogen at temperatures much lower than the melting point (1414<~~big~~>o</~~big~~>C). Based on this phenomenon, migrating atoms smooth out the surface roughness to minimize the total surface energy without losing volume.		Anisotropic wet etching such as potassium hydroxide (KOH) and tetramethylammonium hydroxide (TMAH) can form smooth sidewalls, but the geometry is limited by crystal planes. Another solution is to develop post-dry etching processes to remove the sidewall scallops. Sacrificial thermal oxidation has been utilized to improve sidewall quality. However, the process consumes too much silicon and builds up residual stress. By employing hydrogen annealing, it was reported that sidewall scallops can be dramatically reduced. The surface mobility of silicon atoms is enhanced by heated hydrogen at temperatures much lower than the melting point (1414<sup>o</sup>C). Based on this phenomenon, migrating atoms smooth out the surface roughness to minimize the total surface energy without losing volume.

	Hydrogen-induced surface migration not only changes the surface morphology but also affects the global profile if the surface migration length is comparable to or larger than structural dimensions. This effect is similar to the reflow process in glasses or polymers, but unlike the reflow process, this mechanism only depends on surface-atom movement and the crystalline structure is preserved. Thermal annealing in hydrogen ambient has also been reported to produce round corners and various voids in bulk silicon.		Hydrogen-induced surface migration not only changes the surface morphology but also affects the global profile if the surface migration length is comparable to or larger than structural dimensions. This effect is similar to the reflow process in glasses or polymers, but unlike the reflow process, this mechanism only depends on surface-atom movement and the crystalline structure is preserved. Thermal annealing in hydrogen ambient has also been reported to produce round corners and various voids in bulk silicon.

	This project aims to facilitate a reliable creation of smooth and slender nanostructures to demonstrate the ability in some state-of-the-art and novel NEMS applications include 1) resonators and sensors for physical and bio-chemical sensing down to the molecular level both because of the much reduced mass, 2) nanowires for novel transistors and photovoltaics increasingly exploring quantum effects starting at the sub-50nm level, 3) nanostructures for photonics (around the wavelength of the guided photons) and next generation storage (10nm and below), 4) black silicon for high area catalyzed reaction chambers and photovoltaics, 5) through wafer vias for packaging applications, and 6) nano imprint lithography (NIL) masters. The approach is to first create nanoscale silicon patterns using the modern high density plasma tool (SPTS DRIE-Pegasus). This structure is then annealed in pure hydrogen at high temperature (1100<~~big~~>o</~~big~~>C) and high vacuum (10E-6 mbar) using an annealling tool (Annealsys RTP-150-HV). The quantitative analysis on the sidewall roughness reduction will be measured using scanning electron microscopes (SEM) and atomic force microscope (AFM).		This project aims to facilitate a reliable creation of smooth and slender nanostructures to demonstrate the ability in some state-of-the-art and novel NEMS applications include 1) resonators and sensors for physical and bio-chemical sensing down to the molecular level both because of the much reduced mass, 2) nanowires for novel transistors and photovoltaics increasingly exploring quantum effects starting at the sub-50nm level, 3) nanostructures for photonics (around the wavelength of the guided photons) and next generation storage (10nm and below), 4) black silicon for high area catalyzed reaction chambers and photovoltaics, 5) through wafer vias for packaging applications, and 6) nano imprint lithography (NIL) masters. The approach is to first create nanoscale silicon patterns using the modern high density plasma tool (SPTS DRIE-Pegasus). This structure is then annealed in pure hydrogen at high temperature (1100<sup>o</sup>C) and high vacuum (10E-6 mbar) using an annealling tool (Annealsys RTP-150-HV). The quantitative analysis on the sidewall roughness reduction will be measured using scanning electron microscopes (SEM) and atomic force microscope (AFM).

Vthongu: /* Project Description */

2019-02-27T13:33:24Z

Project Description

← Older revision		Revision as of 15:33, 27 February 2019
Line 8:		Line 8:
	Plasma processes are important for micro electro-mechanical systems (MEMS) with critical dimensions of a few microns. The so-called Bosch etch process is probably the most popular technique in MEMS production facilities today. It uses a repeating sequence of plasma enhanced deposition to passivate silicon features, a physical etch for directional removal of this layer at the base of the features, and an isotropic etch for silicon removal at the cleared surfaces. However, it is not well suited to the nanoscale due to finite sidewall scallop size and undercut unless rate and selectivity are severely compromised.		Plasma processes are important for micro electro-mechanical systems (MEMS) with critical dimensions of a few microns. The so-called Bosch etch process is probably the most popular technique in MEMS production facilities today. It uses a repeating sequence of plasma enhanced deposition to passivate silicon features, a physical etch for directional removal of this layer at the base of the features, and an isotropic etch for silicon removal at the cleared surfaces. However, it is not well suited to the nanoscale due to finite sidewall scallop size and undercut unless rate and selectivity are severely compromised.

	Anisotropic wet etching such as potassium hydroxide (KOH) and tetramethylammonium hydroxide (TMAH) can form smooth sidewalls, but the geometry is limited by crystal planes. Another solution is to develop post-dry etching processes to remove the sidewall scallops. Sacrificial thermal oxidation has been utilized to improve sidewall quality. However, the process consumes too much silicon and builds up residual stress. By employing hydrogen annealing, it was reported that sidewall scallops can be dramatically reduced. The surface mobility of silicon atoms is enhanced by heated hydrogen at temperatures much lower than the melting point (~~1414oC~~). Based on this phenomenon, migrating atoms smooth out the surface roughness to minimize the total surface energy without losing volume.		Anisotropic wet etching such as potassium hydroxide (KOH) and tetramethylammonium hydroxide (TMAH) can form smooth sidewalls, but the geometry is limited by crystal planes. Another solution is to develop post-dry etching processes to remove the sidewall scallops. Sacrificial thermal oxidation has been utilized to improve sidewall quality. However, the process consumes too much silicon and builds up residual stress. By employing hydrogen annealing, it was reported that sidewall scallops can be dramatically reduced. The surface mobility of silicon atoms is enhanced by heated hydrogen at temperatures much lower than the melting point (1414<big>o</big>C). Based on this phenomenon, migrating atoms smooth out the surface roughness to minimize the total surface energy without losing volume.

	Hydrogen-induced surface migration not only changes the surface morphology but also affects the global profile if the surface migration length is comparable to or larger than structural dimensions. This effect is similar to the reflow process in glasses or polymers, but unlike the reflow process, this mechanism only depends on surface-atom movement and the crystalline structure is preserved. Thermal annealing in hydrogen ambient has also been reported to produce round corners and various voids in bulk silicon.		Hydrogen-induced surface migration not only changes the surface morphology but also affects the global profile if the surface migration length is comparable to or larger than structural dimensions. This effect is similar to the reflow process in glasses or polymers, but unlike the reflow process, this mechanism only depends on surface-atom movement and the crystalline structure is preserved. Thermal annealing in hydrogen ambient has also been reported to produce round corners and various voids in bulk silicon.

	This project aims to facilitate a reliable creation of smooth and slender nanostructures to demonstrate the ability in some state-of-the-art and novel NEMS applications include 1) resonators and sensors for physical and bio-chemical sensing down to the molecular level both because of the much reduced mass, 2) nanowires for novel transistors and photovoltaics increasingly exploring quantum effects starting at the sub-50nm level, 3) nanostructures for photonics (around the wavelength of the guided photons) and next generation storage (10nm and below), 4) black silicon for high area catalyzed reaction chambers and photovoltaics, 5) through wafer vias for packaging applications, and 6) nano imprint lithography (NIL) masters. The approach is to first create nanoscale silicon patterns using the modern high density plasma tool (SPTS DRIE-Pegasus). This structure is then annealed in pure hydrogen at high temperature (~~1100oC~~) and high vacuum (10E-6 mbar) using an annealling tool (Annealsys RTP-150-HV). The quantitative analysis on the sidewall roughness reduction will be measured using scanning electron microscopes (SEM) and atomic force microscope (AFM).		This project aims to facilitate a reliable creation of smooth and slender nanostructures to demonstrate the ability in some state-of-the-art and novel NEMS applications include 1) resonators and sensors for physical and bio-chemical sensing down to the molecular level both because of the much reduced mass, 2) nanowires for novel transistors and photovoltaics increasingly exploring quantum effects starting at the sub-50nm level, 3) nanostructures for photonics (around the wavelength of the guided photons) and next generation storage (10nm and below), 4) black silicon for high area catalyzed reaction chambers and photovoltaics, 5) through wafer vias for packaging applications, and 6) nano imprint lithography (NIL) masters. The approach is to first create nanoscale silicon patterns using the modern high density plasma tool (SPTS DRIE-Pegasus). This structure is then annealed in pure hydrogen at high temperature (1100<big>o</big>C) and high vacuum (10E-6 mbar) using an annealling tool (Annealsys RTP-150-HV). The quantitative analysis on the sidewall roughness reduction will be measured using scanning electron microscopes (SEM) and atomic force microscope (AFM).

Vthongu: /* Project Description */

2019-02-27T13:32:00Z

Project Description

← Older revision		Revision as of 15:32, 27 February 2019
Line 10:		Line 10:
	Anisotropic wet etching such as potassium hydroxide (KOH) and tetramethylammonium hydroxide (TMAH) can form smooth sidewalls, but the geometry is limited by crystal planes. Another solution is to develop post-dry etching processes to remove the sidewall scallops. Sacrificial thermal oxidation has been utilized to improve sidewall quality. However, the process consumes too much silicon and builds up residual stress. By employing hydrogen annealing, it was reported that sidewall scallops can be dramatically reduced. The surface mobility of silicon atoms is enhanced by heated hydrogen at temperatures much lower than the melting point (1414oC). Based on this phenomenon, migrating atoms smooth out the surface roughness to minimize the total surface energy without losing volume.		Anisotropic wet etching such as potassium hydroxide (KOH) and tetramethylammonium hydroxide (TMAH) can form smooth sidewalls, but the geometry is limited by crystal planes. Another solution is to develop post-dry etching processes to remove the sidewall scallops. Sacrificial thermal oxidation has been utilized to improve sidewall quality. However, the process consumes too much silicon and builds up residual stress. By employing hydrogen annealing, it was reported that sidewall scallops can be dramatically reduced. The surface mobility of silicon atoms is enhanced by heated hydrogen at temperatures much lower than the melting point (1414oC). Based on this phenomenon, migrating atoms smooth out the surface roughness to minimize the total surface energy without losing volume.

	This project aims to facilitate a reliable creation of smooth and slender nanostructures. The approach is to first ~~improve~~ the ~~Bosch process to minimize the scallops in the nanoscale etching~~. ~~The etched nanostructure~~ is then ~~smoothened and reshaped by annealing~~ at a high temperature ~~in H2 ambient~~ using ~~a to~~-be-~~established RTP tool~~. The ~~experimental work will be done in the cleanroom facility at DTU Danchip and~~ the ~~tools~~ will be ~~optimized to create~~ and ~~produce novel NEMS devices~~.		Hydrogen-induced surface migration not only changes the surface morphology but also affects the global profile if the surface migration length is comparable to or larger than structural dimensions. This effect is similar to the reflow process in glasses or polymers, but unlike the reflow process, this mechanism only depends on surface-atom movement and the crystalline structure is preserved. Thermal annealing in hydrogen ambient has also been reported to produce round corners and various voids in bulk silicon.

			This project aims to facilitate a reliable creation of smooth and slender nanostructures to demonstrate the ability in some state-of-the-art and novel NEMS applications include 1) resonators and sensors for physical and bio-chemical sensing down to the molecular level both because of the much reduced mass, 2) nanowires for novel transistors and photovoltaics increasingly exploring quantum effects starting at the sub-50nm level, 3) nanostructures for photonics (around the wavelength of the guided photons) and next generation storage (10nm and below), 4) black silicon for high area catalyzed reaction chambers and photovoltaics, 5) through wafer vias for packaging applications, and 6) nano imprint lithography (NIL) masters. The approach is to first create nanoscale silicon patterns using the modern high density plasma tool (SPTS DRIE-Pegasus). This structure is then annealed in pure hydrogen at high temperature (1100oC) and high vacuum (10E-6 mbar) using an annealling tool (Annealsys RTP-150-HV). The quantitative analysis on the sidewall roughness reduction will be measured using scanning electron microscopes (SEM) and atomic force microscope (AFM).

Vthongu: /* Project Description */

2019-02-27T13:25:28Z

Project Description

← Older revision		Revision as of 15:25, 27 February 2019
Line 6:		Line 6:

	==Project Description==		==Project Description==
			Plasma processes are important for micro electro-mechanical systems (MEMS) with critical dimensions of a few microns. The so-called Bosch etch process is probably the most popular technique in MEMS production facilities today. It uses a repeating sequence of plasma enhanced deposition to passivate silicon features, a physical etch for directional removal of this layer at the base of the features, and an isotropic etch for silicon removal at the cleared surfaces. However, it is not well suited to the nanoscale due to finite sidewall scallop size and undercut unless rate and selectivity are severely compromised.

			Anisotropic wet etching such as potassium hydroxide (KOH) and tetramethylammonium hydroxide (TMAH) can form smooth sidewalls, but the geometry is limited by crystal planes. Another solution is to develop post-dry etching processes to remove the sidewall scallops. Sacrificial thermal oxidation has been utilized to improve sidewall quality. However, the process consumes too much silicon and builds up residual stress. By employing hydrogen annealing, it was reported that sidewall scallops can be dramatically reduced. The surface mobility of silicon atoms is enhanced by heated hydrogen at temperatures much lower than the melting point (1414oC). Based on this phenomenon, migrating atoms smooth out the surface roughness to minimize the total surface energy without losing volume.

			This project aims to facilitate a reliable creation of smooth and slender nanostructures. The approach is to first improve the Bosch process to minimize the scallops in the nanoscale etching. The etched nanostructure is then smoothened and reshaped by annealing at a high temperature in H2 ambient using a to-be-established RTP tool. The experimental work will be done in the cleanroom facility at DTU Danchip and the tools will be optimized to create and produce novel NEMS devices.