Specific Process Knowledge/Lithography/Coaters/Spin Track 1 + 2 processing

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This spin coater was decommissionned 2018-02-01!

General Process Information

Processing using Spin Track 1 + 2 is divided into three parts:

  • HMDS priming
  • Spin coating
  • Soft baking

As part of the processing of negative tone resists and chemically amplified positive tone resists, Spin Track 2 may also be used for:

  • Post-exposure baking (at 110°C)

Features of Spin Track 1 + 2:

  • Cassette-to-cassette wafer handling
  • In-line HMDS priming
  • Temperature controlled resist lines

The resist lines are temperature controlled using 25°C water from a chiller. The priming module coolplate is cooled by the same chiller. If the process flow has been properly designed, the wafer and resist should have the same temperature during spin coating, ensuring good coating reproducibility.

HMDS priming

The process of HMDS priming on Spin Track 1 + 2 consists of five steps:

  • Contact bake
  • Vacuum bake
  • Priming
  • Pump-purge
  • Cooling

The wafer is first baked in contact with the hotplate in order to heat the wafer to the hotplate temperature. The hotplates of the priming modules are set to 50°C. Then the wafer is baked under a low vacuum (~0.5 bar) in order to dehydrate the wafer before HMDS application. The HMDS is applied to the wafer using nitrogen as a carrier gas. 15 liters per minute of dry nitrogen is bubbled through liquid HMDS before flowing across the wafer surface. After the priming, the chamber is pump-purged twice, using a 7s pump to ~0.5 bar and a 10s nitrogen purge at 40 liters per minute. Finally, the wafer is cooled on the priming module coolplate.

The contact angle after HMDS priming is a function of the priming temperature, the priming time, and the surface condition of the wafer. Tests have shown the contact angle to decrease with increasing hotplate temperature, while it increases as a function of priming time at constant temperature. At a priming temperature of 50°C, the contact angle resulting from priming an oxidized silicon wafer for t = 30 - 300s may be approximated by

The condition of the substrate surface is again a function of the substrate type, the substrate history, and the vacuum baking temperature and time. Since the vapor pressure of water at 50°C (0.123 bar) is lower than the vacuum bake pressure of 0.5 bar, the degree of dehydration will be a function of the vacuum baking time. Thus, for thick oxides, the standard of 30s vacuum bake may not be enough to dehydrate the surface sufficiently.

Spin coating

The process of spin coating on Spin Track 1 + 2 consists of a selection of the following steps:

  • Acceleration to a low spin speed if dynamic dispense is used
  • Resist dispense
  • Resist spreading at low spin speed
  • Spin-off
  • Deceleration before stop or further process steps
  • Edge-bead removal using PGMEA
  • Backside rinse using PGMEA

The wafer is first centered on the spindle chuck and held in place by vacuum. If static dispense is specified in the process, the spindle remains static during the ensuing resist dispense. In the case of dynamic dispense, the spindle is accelerated to a low spin speed before the resist is dispensed. Using too high spin speed during dispense can cause surface wetting issues, while a too low spin speed causes the resist to flow onto the backside of the wafer. The resist is dispensed through the dispense arm, positioned over the center of the wafer. The resist pump administers a fixed volume of resist (4 ml), but multiple dispenses may be used. After dispense, a short spin at low spin speed may be used in order to spread the resist over the wafer surface before spin-off.

The spin-off cycle determines the thickness of the resist coating. The thickness is primarily a function of the spin-off speed and the spin-off time, both following an inverse power-law (y=k*x^-a). The acceleration to the spin-off speed also influences the thickness, but the effect is dependent on previous steps. The spin-off is usually a simple spin at one speed, but it may be comprised of several steps at different spin speeds. After spin-off, the wafer is decelerated.

During spin coating, resist builds up at the edge of the wafer due to the change in surface tension at the edge. This phenomenon is called an edge-bead. Dependent on spin coating parameters, the coating may be several times thicker at the edge than in the central area. In a subsequent hard contact exposure step, this edge-bead induces an undesired proximity gap which reduces the lateral resolution, and may even cause the wafer to stick to the mask. In an edge-bead removal step, solvent administered through a nozzle positioned at the edge of the wafer while spinning at low or medium spin speed dissolves the resist and washes it away. After the removal, a short spin at medium spin speed dries the wafer before the soft bake. Dependent on the viscosity (solvent content) of the resist at the point of edge-bead removal, this drying spin may cause the resist to re-flow and create a secondary edge-bead. In some cases, it may be necessary to (partially) soft bake the resist before edge-bead removal.

Dependent on the spin speeds used in the various steps of the spin coating, resist may creep over the edge of the wafer and onto the backside. Also, some resists tend to leave fine strings of resist protruding from the edge of the wafer, or folded onto the backside, an effect sometimes referred to as "cotton candy". This resist will contaminate the soft bake hotplate, and thus subsequent wafers with resist. In a backside rinse step, solvent administered through a nozzle to the backside of the wafer while spinning at low or medium spin speed dissolves the resist and washes it away. After the rinse, a short spin at medium spin speed dries the wafer before the soft bake. During the backside rinse solvent inevitably creeps onto the front side of the wafer. This effect may be used to dissolve and subsequently remove an edge-bead, but it may also leave the rim of the wafer exposed. As an alternative to backside rinse, a wafer which is left dirty on the backside by the spin coat process may be soft baked in proximity in order to protect the hotplate from contamination. This leaves front side coating intact, but also leaves the backside dirty.

Soft baking

After spin coating the solvent in the resist formulation must be evaporated in a baking step in order to solidify the resist. This soft bake can be carried out as a contact bake or a proximity bake. In a contact bake, the wafer is held in close contact to the hotplate surface by vacuum during the bake. In a proximity bake, the wafer is first moved into close proximity, e.g. 1mm, of the hotplate surface, then held there for the duration of the bake. The hotplate temperatures of the baking modules of Spin Track 1 and 2 are fixed at temperatures relevant to the resist used, i.e. 90°C and 110°C, respectively. After baking, the wafer is cooled for 5 seconds on the coolplate.

Post-exposure baking

Negative resists and chemically amplified positive resists must be baked after exposure in order to finish the process initiated by the exposure light. Post-exposure bake, or PEB, can be carried out as a contact bake or a proximity bake. In a contact bake, the wafer is held in close contact to the hotplate surface by vacuum during the bake. In a proximity bake, the wafer is first moved into close proximity, e.g. 1mm, of the hotplate surface, then held there for the duration of the bake. Since the hotplate temperatures of Spin Track 1 + 2 are fixed, PEB is only possible at 90°C or 110°C. In practice, only 110°C (Spin Track 2) is used. After baking, the wafer is cooled for 5 seconds on the coolplate.

Standard Processes

HMDS priming only

The standard HMDS priming process has been developed to mimic the behavior of the IMTEC Star2000 HMDS oven. It produces a contact angle of 81-82° on an oxidized silicon surface. General information on HMDS priming can be found here.

Flow names, process parameters, and test results:

  • T1 T2 HMDS Standard

Process parameters: 10s contact bake, 30s vacuum bake, 72s HMDS priming, 5s cooling.

Test results:

Substrate Contact angle Test date Tester initials Comments
110 nm oxide 82.0° 7/5 2013 taran average of three measurements on one sample
111 nm oxide 70.6° 2/12 2015 npemo average of five measurements on one sample from T1 (T2 = 69.3°)
Si with native oxide 73.3° 7/5 2013 taran average of nine measurements (three measurements on three different samples)
Si with native oxide 66.4° 2/12 2015 npemo average of five measurements on one sample from T1 (T2 = 65.5°)
Borofloat (glass) 65.6° 7/5 2013 taran average of three measurements on one sample
Borofloat (glass) 81.9° 2/12 2015 npemo average of three measurements on one sample from T1 (T2 = 81.4°)
3 µm oxide 81.8° 12/6 2013 taran
15 µm oxide 68-70° 20/6 2013 taran dehydrated 1 hour at 250°C
15 µm oxide 71° 21/6 2013 taran dehydrated 18 hours at 250°C

The deviation between tests performed in 2013 and 2015 will be investigated in spring 2016.

AZ MiR 701 (29cps) coating

Spin coating of AZ MiR 701 (29cps) on Spin Track 1 is divided into two or three steps: HMDS priming (optional), spin coating, and soft baking. At the moment, the HMDS priming is equal to the standard priming, but this may be subject to change as our process knowledge grows. Spin coating uses dynamic dispence of 4 ml resist at 800 rpm, followed by spin-off at a thickness dependent spin speed for a thickness dependent time. The wafer is deaccelerated at 1000 rpm/s for 5 seconds before stopping. Soft baking is done at 90°C for 60s. As MiR 701 has a tendency to produce "cotton candy" on the edges, soft baking is performed in 1 mm proximity.

Flow names, process parameters, and test results:

  • T1 MiR 701 1um no HMDS
  • T1 MiR 701 1um with HMDS

Spin-off: 60 s at 9990 rpm.

Substrate Thickness Uniformity (+/-) Test date Tester initials Comments
Silicon with native oxide 1.053 0.33% 5/9 2013 taran with HMDS. Average of 3 wafers


  • T1 MiR 701 1,5um no HMDS
  • T1 MiR 701 1,5um with HMDS

Spin-off: 30 s at 5000 rpm.

Substrate Thickness Uniformity (+/-) Test date Tester initials Comments
Silicon with native oxide 1.534 µm 0.3% 26/01 2016 chasil with HMDS. Average of 3 wafers
Silicon with native oxide 1.553 µm 0.3% 21/02 2016 chasil with HMDS. Average of 3 wafers


  • T1 MiR 701 2um no HMDS
  • T1 MiR 701 2um with HMDS

Spin-off: 30 s at 2600 rpm.

Substrate Thickness Uniformity (+/-) Test date Tester initials Comments
Silicon with native oxide 2.019 0.42% 5/9 2013 taran with HMDS. Average of 3 wafers

AZ nLOF 2020 coating

Spin coating of AZ nLOF 2020 on Spin Track 2 is divided into two or three steps: HMDS priming (optional), spin coating, and soft baking. At the moment, the HMDS priming is equal to the standard priming, but this may be subject to change as our process knowledge grows. Spin coating uses dynamic dispence of 4 ml resist at 1000 rpm, followed by spin-of at a thickness dependent spin speed for a thickness dependent time. The wafer is deaccelerated at 1000 rpm/s for 5 seconds before stopping. Soft baking is done at 110°C for 60s, normally as a contact bake. In order to enable double-sided coating of nLOF, recipes have been created witch use a 1mm proximity bake for the softbake (prox SB).

Flow names, process parameters, and test results:

  • T2 nLOF 2020 1,5um no HMDS
  • T2 nLOF 2020 1,5um prox SB no HMDS
  • T2 nLOF 2020 1,5um with HMDS

Spin-of: 30 s at 6700 rpm.

Substrate Thickness Uniformity (+/-) Test date Tester initials Comments
Silicon with native oxide 1.483 0.48% 5/9 2013 taran with HMDS. Average of 3 wafers


  • T2 nLOF 2020 2um no HMDS
  • T2 nLOF 2020 2um prox SB no HMDS
  • T2 nLOF 2020 2um with HMDS

Spin-of: 30 s at 3800 rpm.

Substrate Thickness Uniformity (+/-) Test date Tester initials Comments
Silicon with native oxide 1.923 0.6% 19/12 2015 chasil with HMDS. Average of 3 wafers
Silicon with native oxide 1.929 0.5% 28/01 2016 chasil with HMDS. Average of 3 wafers


  • T2 nLOF 2020 3um no HMDS
  • T2 nLOF 2020 3um prox SB no HMDS
  • T2 nLOF 2020 3um with HMDS

Spin-of: 30 s at 1700 rpm.

Substrate Thickness Uniformity (+/-) Test date Tester initials Comments
Silicon with native oxide 2.948 0.62% 5/9 2013 taran with HMDS. Average of 3 wafers

Post-exposure baking (PEB)

Negative resists and chemically amplified positive resists must be baked after exposure in order to finish the process initiated by the exposure light.

Flow names and process parameters:

  • T2 5214E image reversal bake

Process parameters: 100s contact bake at 110°C.

  • T2 MiR 701 PEB

Process parameters: 60s 1mm proximity bake at 110°C.

  • T2 nLOF 2020 PEB

Process parameters: 60s contact bake at 110°C.